CAT93C66XI ON Semiconductor, CAT93C66XI Datasheet - Page 5

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CAT93C66XI

Manufacturer Part Number
CAT93C66XI
Description
IC EEPROM 4KBIT 2MHZ 8SOIC
Manufacturer
ON Semiconductor
Datasheets

Specifications of CAT93C66XI

Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
4K (512 x 8 or 256 x 16)
Speed
2MHz
Interface
Microwire, 3-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
Density
4Kb
Interface Type
Serial (Microwire)
Organization
512x8/256x16
Frequency (max)
500KHz
Write Protection
Yes
Data Retention
100Year
Operating Supply Voltage (typ)
3.3/5V
Package Type
SOIC EIAJ
Operating Temp Range
-40C to 85C
Supply Current
3mA
Operating Supply Voltage (min)
2.5V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CAT93C66XI
Manufacturer:
CATALYST
Quantity:
20 000
Company:
Part Number:
CAT93C66XI
Quantity:
264
POWER-UP TIMING
Notes
(1) These parameters are tested initially and after a design or process change that affects the parameter according to appropriate
(2) t
A.C. TEST CONDITIONS
DEVICE OPERATION
The CAT93C66 is a 4096-bit nonvolatile memory
intended for use with industry standard micropro–
cessors. The CAT93C66 can be organized as either
registers of 16 bits or 8 bits. When organized as X16,
seven 11-bit instructions control the reading, writing and
erase operations of the device. When organized as X8,
seven 12-bit instructions control the reading, writing and
erase operations of the device. The CAT93C66 operates
on a single power supply and will generate on chip, the
high voltage required during any write operation.
Instructions, addresses, and write data are clocked
into the DI pin on the rising edge of the clock (SK).
The DO pin is normally in a high impedance state
except when reading data from the device, or when
checking the ready/busy status after a write operation.
The serial communication protocol follows the timing
shown in Figure 1.
INSTRUCTION SET
© 2009 SCILLC. All rights reserved
Characteristics subject to change without notice
Input Rise and Fall Times
Input Pulse Voltages
Timing Reference Voltages
Input Pulse Voltages
Timing Reference Voltages
Output Load
Instruction
ERASE
Symbol
WRITE
EWEN
EWDS
WRAL
AEC-Q100 and JEDEC test methods.
READ
ERAL
PUR
:
t
t
PUW
PUR
and t
PUW
are the delays required from the time V
Parameter
Power-up to Read Operation
Power-up to Write Operation
Start
Bit
1
1
1
1
1
1
1
(1) (2)
Opcode
10
11
01
00
00
00
00
0.4V to 2.4V
0.8V, 2.0V
Current Source I
0.2V
0.5V
50 ns
CC
CC
11XXXXXXX
00XXXXXXX
10XXXXXXX
01XXXXXXX
to 0.7V
A8-A0
A8-A0
A8-A0
x8
CC
CC
Address
is stable until the specified operation can be initiated.
OLmax
4.5V ≤ V
4.5V ≤ V
1.8V ≤ V
1.8V ≤ V
/I
11XXXXXX
00XXXXXX
10XXXXXX
01XXXXXX
OHmax
A7-A0
A7-A0
A7-A0
5
x16
Max
The ready/busy status can be determined after the start
of internal write cycle by selecting the device (CS high)
and polling the DO pin; DO low indicates that the write
operation is not completed, while DO high indicates that
the device is ready for the next instruction. If necessary,
the DO pin may be placed back into a high impedance
state during chip select by shifting a dummy “1” into the
DI pin. The DO pin will enter the high impedance state
on the rising edge of the clock (SK). Placing the DO pin
into the high impedance state is recommended in
applications where the DI pin and the DO pin are to be
tied together to form a common DI/O pin.
The format for all instructions sent to the device is a
logical “1” start bit, a 2-bit (or 4-bit) opcode, 8-bit
address (an additional bit when organized X8) and for
write operations a 16-bit data field (8-bit for X8
organizations). The instruction format is shown in
Instruction Set table.
; CL=100pF
1
1
CC
CC
CC
CC
≤ 5.5V
≤ 5.5V
≤ 4.5V
≤ 4.5V
D7-D0
D7-D0
x8
Units
ms
ms
Data
D15-D0
D15-D0
x16
Read Address AN – A0
Clear Address AN – A0
Write Address AN – A0
Write Enable
Write Disable
Clear All Addresses
Write All Addresses
Comments
Doc. No. MD-1089 Rev. T
CAT93C66

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