AT17C002-10JC Atmel, AT17C002-10JC Datasheet - Page 3
![IC SRL CONFIG EEPROM 2M 20PLCC](/photos/6/80/68044/453-20-plcc_sml.jpg)
AT17C002-10JC
Manufacturer Part Number
AT17C002-10JC
Description
IC SRL CONFIG EEPROM 2M 20PLCC
Manufacturer
Atmel
Datasheet
1.AT17C002-10CI.pdf
(19 pages)
Specifications of AT17C002-10JC
Programmable Type
Serial EEPROM
Memory Size
2Mb
Voltage - Supply
4.75 V ~ 5.25 V
Operating Temperature
0°C ~ 70°C
Package / Case
20-LCC (J-Lead)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Block Diagram
Device Description
2281D–12/01
POWER ON
CONTROL
RESET
OSC
OSC
SER_EN
WP1
CLK READY
The control signals for the configuration EEPROM (CE, RESET/OE and CCLK) inter-
face directly with the FPGA device control signals. All FPGA devices can control the
entire configuration process and retrieve data from the configuration EEPROM without
requiring an external intelligent controller.
The configuration EEPROM RESET/OE and CE pins control the tri-state buffer on the
DATA output pin and enable the address counter. When RESET/OE is driven High, the
configuration EEPROM resets its address counter and tri-states its DATA pin. The CE
pin also controls the output of the AT17 Series Configurator. If CE is held High after the
RESET/OE reset pulse, the counter is disabled and the DATA output pin is tri-stated.
When OE is subsequently driven Low, the counter and the DATA output pin are
enabled. When RESET/OE is driven High again, the address counter is reset and the
DATA output pin is tri-stated, regardless of the state of CE.
When the configurator has driven out all of its data and CEO is driven Low, the device
tri-states the DATA pin to avoid contention with other configurators. Upon power-up, the
address counter is automatically reset.
This is the default setting for the device. Since almost all FPGAs use RESET Low and
OE High, this document will describe RESET/OE.
PROGRAMMING
COUNTER
COUNTER
ADDRESS
MODE LOGIC
ROW
RESET/OE
BIT
CE
DECODER
ROW
TC
CEO(A2)
PROGRAMMING
DECODER
COLUMN
DATA SHIFT
REGISTER
AT17C/LV002
EEPROM
MATRIX
CELL
DATA
3