EPCS16SI16N Altera, EPCS16SI16N Datasheet - Page 3

IC CONFIG DEVICE 16MBIT 16-SOIC

EPCS16SI16N

Manufacturer Part Number
EPCS16SI16N
Description
IC CONFIG DEVICE 16MBIT 16-SOIC
Manufacturer
Altera
Series
EPCSr
Datasheets

Specifications of EPCS16SI16N

Programmable Type
In System Programmable
Memory Size
16Mb
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
16-SOIC (0.300", 7.50mm Width)
Memory Type
Flash
Clock Frequency
20MHz
Supply Voltage Range
2.7V To 3.6V
Memory Case Style
SOIC
No. Of Pins
16
Operating Temperature Range
-40°C To +85°C
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-1240-5
EPCS16SI16

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Chapter 3: Serial Configuration Devices (EPCS1, EPCS4, EPCS16, EPCS64, and EPCS128) Data Sheet
Active Serial FPGA Configuration
Figure 3–1. Serial Configuration Device Block Diagram
Accessing Memory in Serial Configuration Devices
Active Serial FPGA Configuration
© December 2009
f
1
Altera Corporation
The serial configuration devices are designed to configure the Cyclone series and all
device families in the Stratix series except the Stratix device family. It cannot configure
other existing Altera FPGA device families.
Figure 3–1
You can access the unused memory locations of the serial configuration device to store
or retrieve data through the Nios processor and SOPC Builder. SOPC Builder is an
Altera tool for creating bus-based (especially microprocessor-based) systems in Altera
devices. SOPC Builder assembles library components such as processors and
memories into custom microprocessor systems.
SOPC Builder includes the EPCS device controller core, which is an interface core
specifically designed to work with the serial configuration device. With this core, you
can create a system with a Nios embedded processor that allows software access to
any memory location within the serial configuration device.
For more information about accessing memory within the serial configuration device,
refer to the
The following Altera FPGAs support Active Serial (AS) configuration scheme with
serial configuration devices:
This section is only relevant for FPGAs that support the AS configuration scheme.
Arria series
Cyclone series
all device families in the Stratix series except the Stratix device family
Serial Configuration Device
DCLK
nCS
shows the serial configuration device block diagram.
Active Serial Memory Interface Data
Address Counter
Decode Logic
Control
Logic
Data Buffer
Register
I/O Shift
Memory
Array
Sheet.
Configuration Handbook (Complete Two-Volume Set)
Status Register
DATA
ASDI
3–3

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