TEA1532BT/N1/S35,1 NXP Semiconductors, TEA1532BT/N1/S35,1 Datasheet
TEA1532BT/N1/S35,1
Specifications of TEA1532BT/N1/S35,1
Related parts for TEA1532BT/N1/S35,1
TEA1532BT/N1/S35,1 Summary of contents
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TEA1532BT; TEA1532CT GreenChip II SMPS control IC Rev. 01 — 18 January 2007 1. General description The GreenChip II is the second generation of controller ICs intended for green flyback Switched Mode Power Supplies (SMPS). Its high level of integration ...
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... NXP Semiconductors I Undervoltage protection (fold back during overload OverTemperature Protection (OTP) (latched) I Low and adjustable OverCurrent Protection (OCP) trip level I Soft (re)start I Mains voltage-dependent operation-enabling level I TEA1532CT: general purpose input for latched or safe restart protection and timing, e. used for OverVoltage Protection (OVP), output short-circuit protection or ...
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... NXP Semiconductors 5. Block diagram internal supply V mains(oper)(en GND OSCILLATOR SLOPE COMPENSATION CTRL 1 5.6 V control detect 0. PROTECT 300 5 dch (1) Switch S3 is not controlled in the TEA1532BT (fixed as drawn). Fig 1. Block diagram TEA1532BT_TEA1532CT_1 Product data sheet TEA1532BT; TEA1532CT SUPPLY MANAGEMENT DCM UVLO start AND ...
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... NXP Semiconductors 6. Pinning information 6.1 Pinning Fig 2. Pin configuration: TEA1532BT and TEA1532CT (SOT96-1) 6.2 Pin description Table 2. Symbol V CC GND PROTECT CTRL DEM SENSE DRIVER DRAIN 7. Functional description The TEA1532BT; TEA1532CT is a controller for a compact flyback converter with the IC situated on the primary side. An auxiliary winding of the transformer provides demagnetization detection and powers the IC after start-up ...
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... NXP Semiconductors Fig 3. Basic configuration The TEA1532BT; TEA1532CT can operate in multi modes; see Fig 4. Multi mode and FF-CCM operation In QR mode, the next converter stroke is started only after demagnetization of the transformer current (zero current switching), while the drain voltage has reached the lowest voltage to minimize switching losses (green function) ...
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... NXP Semiconductors To prevent very high frequency operation at lower loads, the quasi-resonant operation changes smoothly in fixed frequency Pulse Width Modulation (PWM) control. In fixed frequency continuous conduction mode, which can be activated by grounding pin DEM, the internal oscillator determines the start of the next converter stroke. ...
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... NXP Semiconductors Fig 5. The V 7.6 OverCurrent Protection (OCP) The primary peak current in the transformer is measured accurately cycle-by-cycle using the external sense resistor R internal level equal to 1.5 V suppressed during the leading edge blanking period, t caused by the switch-on spikes. 7.7 Demagnetization (QR operation) The system will be in Discontinuous Conduction Mode (DCM) (QR operation) when resistor R secondary stroke has ended ...
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... NXP Semiconductors In an optimum design, the reflected secondary voltage on the primary side will force the drain voltage to zero. Thus, zero voltage switching is possible, preventing large capacitive switching losses results in small and cost-effective magnetics. (1) Start of new cycle at lowest drain voltage. (2) Start of new cycle in a classical PWM system at high drain voltage. ...
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... NXP Semiconductors value of R while operating in FF CCM. A possible drawback of sub-harmonic oscillation can be output voltage ripple. Fig 7. Slope compensation 7.11 Minimum and maximum on-time The minimum on-time of the SMPS is determined by the Leading Edge Blinking (LEB) time (typically 400 ns). The IC limits the on-time to a maximum time, which is dependent on the mode of operation: QR mode: When the system requires an ‘ ...
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... NXP Semiconductors The charging current I below approximately 0 the voltage on pin SENSE exceeds 0.5 V, the soft start current source will start limiting current I is completely switched off; see Since the soft start current is supplied from pin DRAIN, the R current during start-up. Fig 8. Soft start-up 7 ...
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... NXP Semiconductors protection is reset. The latch is reset as soon as V (this only occurs when the mains has been disconnected). The internal overtemperature protection will also trigger this latch; see also For the TEA1532BT the IC always enters the latched mode protection independent of the voltage on pin CTRL ...
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... NXP Semiconductors A low driver source current has been chosen to limit the switch-on. This reduces ElectroMagnetic Interference (EMI) and also limits the current spikes across R 8. Limiting values Table 3. In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Voltages V CC ...
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... NXP Semiconductors 10. Characteristics Table 5. Characteristics Symbol Parameter Start-up current source (pin DRAIN) I current on pin DRAIN DRAIN V breakdown voltage BR V mains-dependent mains(oper)(en) operation-enabling voltage Supply voltage management (pin V V start-up voltage startup V undervoltage lockout th(UVLO) threshold voltage V hysteresis voltage hys I high charging current ...
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... NXP Semiconductors Table 5. Characteristics …continued Symbol Parameter Duty cycle control (pin CTRL) V minimum voltage min( max) (maximum duty cycle) V maximum voltage max( min) (minimum duty cycle slope compensation sc current V detection voltage on pin CTRL(detect) CTRL Protection and timing input (pin PROTECT) V trip voltage ...
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... NXP Semiconductors Table 5. Characteristics …continued Symbol Parameter Driver (pin DRIVER) I source current source I sink current sink V maximum output o(max) voltage Temperature protection T maximum protection pl(max) level temperature T protection level pl(hys) hysteresis temperature [1] TEA1532CT: safe restart; TEA1532BT: latch. [2] Guaranteed by design. [3] V detection level. Set by the demagnetization resistor ...
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... NXP Semiconductors Fig 9. Flyback configuration using the discontinuous conduction mode TEA1532BT_TEA1532CT_1 Product data sheet TEA1532BT; TEA1532CT V mains GND 2 TEA1532BT TEA1532CT PROTECT 3 CTRL 4 R CTRL Rev. 01 — 18 January 2007 GreenChip II SMPS control IC DRAIN 8 power DRIVER 7 MOSFET SENSE DEM R C sense DEM © ...
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... NXP Semiconductors drain of power MOSFET startup DRIVER V PROTECT (1) In CCM, the brown-out protection is implemented by the maximum duty cycle in combination Fig 10. Typical waveforms 1 TEA1532BT_TEA1532CT_1 Product data sheet TEA1532BT; TEA1532CT V th(UVLO) 2.5 V start-up normal sequence operation TEA1532CT with pin PROTECT. Rev. 01 — 18 January 2007 ...
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... NXP Semiconductors (1) When V (2) External OTP for TEA1532BT and TEA1532CT; OVP and output short circuit for TEA1532BT. Fig 11. Typical waveforms 2 TEA1532BT_TEA1532CT_1 Product data sheet TEA1532BT; TEA1532CT DRAIN startup DRIVER (1) V PROTECT start-up sequence is forced above 3 V, the protection is always latched. So the IC is not started at ...
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... NXP Semiconductors (1) The pin PROTECT is used in this example for external OTP and open loop or output Fig 12. Flyback configuration using the continuous conduction mode 12. Test information 12.1 Quality information The General Quality Specification for Integrated Circuits, SNW-FQ-611 is applicable. TEA1532BT_TEA1532CT_1 Product data sheet TEA1532BT ...
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... NXP Semiconductors 13. Package outline SO8: plastic small outline package; 8 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Notes 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...
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... NXP Semiconductors 14. Revision history Table 6. Revision history Document ID Release date TEA1532BT_TEA1532CT_1 20070118 TEA1532BT_TEA1532CT_1 Product data sheet TEA1532BT; TEA1532CT Data sheet status Change notice Product data sheet - Rev. 01 — 18 January 2007 GreenChip II SMPS control IC Supersedes - © NXP B.V. 2007. All rights reserved. ...
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... For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail ...
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... NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2.1 Distinctive features . . . . . . . . . . . . . . . . . . . . . . 1 2.2 Green features . . . . . . . . . . . . . . . . . . . . . . . . . 1 2.3 Protection features . . . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 Functional description . . . . . . . . . . . . . . . . . . . 4 7.1 Start-up, mains enabling operation level and undervoltage lock out ...