L6668 STMicroelectronics, L6668 Datasheet - Page 15

IC CTRLR PWM PROG CM HV 16SOIC

L6668

Manufacturer Part Number
L6668
Description
IC CTRLR PWM PROG CM HV 16SOIC
Manufacturer
STMicroelectronics
Datasheet

Specifications of L6668

Output Isolation
Isolated
Frequency Range
93 ~ 107kHz
Voltage - Input
9.4 ~ 22 V
Power (watts)
750mW
Operating Temperature
-25°C ~ 150°C
Package / Case
16-SOIC (0.154", 3.90mm Width)
Number Of Outputs
1
Duty Cycle (max)
75 %
Output Current
800 mA
Mounting Style
SMD/SMT
Switching Frequency
105 KHz
Maximum Operating Temperature
+ 150 C
Fall Time
30 ns
Minimum Operating Temperature
- 25 C
Rise Time
55 ns
Synchronous Pin
No
Topology
Flyback
Load-dependent Current-mode Control
FIXED-FREQUENCY (HEAVY LOAD), FREQUENCY FOLDBACK (LIGHT LOAD), BURST-MODE (NO-LOAD)
For Use With
497-6389 - BOARD EVAL USING L6668 & STSR30497-5499 - EVAL BOARD FOR L6668
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Figure 39. Standby function: frequency shift vs. timing resistors (normalized quantities)
The determination of R
mode operation takes place (f
noise-free operation. With the aid of the diagrams in figure 39, which show the relationship between the
frequency shift obtained and the ratio of R
possible to determine R
it intercepts the characteristic corresponding to the voltage set at the pin SKIPADJ (#9). From there, draw
a vertical line: on the horizontal axis it is possible to read the required R
Note that the characteristic for V(SKIPADJ)=1.4V corresponds to the burst-mode operation not used (see
next section). Note also that, for a given V(SKIPADJ), there is both a lower limit to the R
a maximum frequency shift allowed. Not observing these limits will result in erratic behavior.
In applications where the switching frequency needs not be tightly fixed for some specific reason there is
no major drawback to this technique. In case this function is not desired, the STBY pin shall be left open.
4.3 Operation at no load or very light load
When the PWM control voltage at pin COMP falls about 50 mV below a threshold externally programma-
ble via pin 9 (SKIPADJ), the IC is disabled with the MOSFET kept in OFF state and its consumption re-
duced at a very low value to minimize Vcc capacitor discharge. The soft-start capacitor is not discharged.
The control voltage now will increase as a result of the feedback reaction to the energy delivery stop, the
threshold will be exceeded and the IC will restart switching again. In this way the converter will work in
burst-mode with a constant peak current defined by the disable level applied at pin 9. A load decrease will
then cause a frequency reduction, which can go down even to few hundred hertz, thus minimizing all fre-
quency-related losses and maximizing efficiency. This kind of operation is noise-free provided the peak
current, which is user-defined by the bias voltage at pin 9, is very low.
The timing diagram of figure 40 illustrates this kind of operation along with the other ones, showing the
most significant signals.
f
f
f
f
min
min
osc
osc
0.9
0.9
0.8
0.8
0.7
0.7
0.6
0.6
0.5
0.5
0.4
0.4
0.3
0.3
0.2
0.2
1
1
0.
0.
STBY
STBY
. Draw an horizontal line corresponding to the desired f
can be done assuming that the minimum switching frequency before burst-
2.5V
2.5V
min
) is specified. This value will be above the audible range to ensure a
2.2V
2.2V
STBY
2V
2V
1.8V
1.8V
to R
T
for different values of the burst-mode threshold, it is
R
R
R
R
STBY
STBY
1
1
T
T
V(SKIPADJ) = 1.6V
V(SKIPADJ) = 1.6V
V(SKIPADJ) = 1.5V
V(SKIPADJ) = 1.5V
V(SKIPADJ) = 1.4V
V(SKIPADJ) = 1.4V
STBY
/R
T
ratio.
min
/f
osc
STBY
ratio as long as
/R
T
ratio and
L6668
10
10
15/23

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