L6668 STMicroelectronics, L6668 Datasheet - Page 19

• Manufacturer Part Number: L6668
• Description: IC CTRLR PWM PROG CM HV 16SOIC
• Manufacturer: STMicroelectronics

Specifications of L6668

• Output Isolation: Isolated
• Frequency Range: 93 ~ 107kHz
• Voltage - Input: 9.4 ~ 22 V
• Power (watts): 750mW
• Operating Temperature: -25°C ~ 150°C
• Package / Case: 16-SOIC (0.154", 3.90mm Width)
• Number Of Outputs: 1
• Duty Cycle (max): 75 %
• Output Current: 800 mA
• Mounting Style: SMD/SMT
• Switching Frequency: 105 KHz
• Maximum Operating Temperature: + 150 C
• Fall Time: 30 ns
• Minimum Operating Temperature: - 25 C
• Rise Time: 55 ns
• Synchronous Pin: No
• Topology: Flyback
• Load-dependent Current-mode Control: FIXED-FREQUENCY (HEAVY LOAD), FREQUENCY FOLDBACK (LIGHT LOAD), BURST-MODE (NO-LOAD)
• For Use With: 497-6389 - BOARD EVAL USING L6668 & STSR30497-5499 - EVAL BOARD FOR L6668
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.7 Disable function
Latched OTP or OVP functions can be easily realized with the L6668: the IC is equipped with a compara-
tor whose non-inverting input is externally available on pin #7 (DIS), and whose inverting input is inter-
nally referenced to 2.2V.
As the voltage on the pin exceeds the threshold the IC is immediately shut down and its consumption re-
duced at a low value. The information is latched and it is necessary to let the voltage on the Vcc pin go
below the UVLO threshold to reset the latch and restart the IC.
To keep the latch supplied as long as the converter is connected to the input source, the HV generator is
activated periodically so that Vcc oscillates between the start-up threshold V
then necessary to disconnect the converter from the input source to restart the IC. This operation is shown
in the timing diagram of figure 44. Activating the HV generator in this way cuts its power dissipation ap-
proximately by three and keeps peak silicon temperature close to the average value.
4.8 Slope compensation
A pin of the device (#15, S-COMP) provides a voltage ramp during MOSFET's ON-time which is a repeti-
tion of the oscillator sawtooth, buffered (0.8 mA min. capability) and level shifted down by one Vbe.
This ramp is intended for implementing additive slope compensation on current sense. This is needed to
avoid the sub-harmonic oscillation that arises in all peak-current-mode-controlled converters working in
continuous conduction mode with a duty cycle close to or exceeding 50%.
Figure 45. Slope compensation waveforms
The compensation will be realized by connecting a programming resistor between this pin and the current
sense input (pin 12, ISEN). The pin has to be connected to the sense resistor with another resistor to make
a summing node on the pin.
Since no ramp is delivered during MOSFET OFF-time (see figure 45), no external component other than
the programming resistor is needed to ensure a clean operation at light loads. If slope compensation is
not required the pin shall be left floating.
S-COMP
S-COMP
OUT
OUT
RCT
RCT
ccON
and V
t
t
t
t
t
t
ccON
- 0.5V. It is
L6668
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