NCP1015ST100T3G ON Semiconductor, NCP1015ST100T3G Datasheet - Page 15

• Manufacturer Part Number: NCP1015ST100T3G
• Description: IC OFFLINE SWIT SMPS CM SOT223
• Manufacturer: ON Semiconductor

Specifications of NCP1015ST100T3G

• Output Isolation: Isolated
• Frequency Range: 90 ~ 110kHz
• Voltage - Input: 8.5 ~ 10 V
• Voltage - Output: 700V
• Power (watts): 19W
• Operating Temperature: 0°C ~ 150°C
• Package / Case: TO-261-4, TO-261AA, SOT-223-4
• Duty Cycle (max): 72 %
• Mounting Style: SMD/SMT
• Switching Frequency: 1000 KHz
• Operating Supply Voltage: - 0.3 V to + 10 V
• Maximum Operating Temperature: + 150 C
• Minimum Operating Temperature: - 60 C
• Operating Temperature (max): 150C
• Pin Count: 3 +Tab
• Mounting: Surface Mount
• Package Type: SOT-223
• Case Length: 6.5mm
• Case Height: 1.57mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

V
DRAIN(max)
2. Current−mode architecture is, by definition,
3. Lateral Mosfets have a poorly doped body−diode
As a result, the Flyback voltage which is reflected on
the drain at the switch opening cannot be larger than
the input voltage. When selecting components, you
thus must adopt a turn ratio which adheres to the
following equation:
For instance, if you operate from a 120 V dc rail and
you deliver 12 V, we can select a reflected voltage of
100 VDC maximum: 120 − 100 > 0. Therefore, the
turn ratio Np : Ns must be smaller than 100 / (12 +
1) = 7.7 or Np : Ns < 7.7. We will see later on how
it affects the calculation.
sensitive to subharmonic oscillations.
Subharmonic oscillations only occur when the
SMPS is operating in Continuous Conduction
Mode (CCM) together with a duty−cycle greater
than 50%. As a result, we recommend operating
the device in DCM only, whatever duty−cycle it
implies (max. = 65%).
which naturally limits their ability to sustain the
avalanche. A traditional RCD clamping network
shall thus be installed to protect the MOSFET. In
some low power applications, a simple capacitor
can also be used since:
where L
capacitance at the drain node (which is increased by
the capacitor you will wire between drain and
source), N the Np : Ns turn ratio, V
voltage, V
finally, I
occurs when the SMPS is very close to regulation,
+ V
f
p
N @ (V
in
is the leakage inductance, C
f
the maximum peak current. Worse case
) N @ (V
the secondary diode forward drop and
out
) V
− 50.0
50.0
350
250
150
out
Figure 25. The Drain−Source Wave Shall Always be Positive . . .
f
) V
) t V
1.004M
f
) ) I
IN(min)
p
@
out
C
tot
L
1.011M
tot
the output
f
the total
(eq. 14)
(eq. 15)
http://onsemi.com
15
1.018M
possible to calculate the maximum power that can be
transferred at low line:
inductance L
the feedback loop. The duration of this event is called the ON
time and can be defined by:
to the secondary and the flyback voltage appears across L
reseting the transformer core with a slope of:
the t
maximum power, we will not allow a dead−time after the
core is reset, but rather immediately re−start. The switching
time t
t
which, by extracting I
t
Extracting L
sw
sw
> 0 !!
Taking into account all previous remarks, it becomes
When the switch closes, V
At the switch opening, the primary energy is transferred
If one wants to keep DCM only, but still need to pass the
The Flyback transfer formula dictates that:
+ t
+ L
off
sw
off
time is thus:
e.g. the V
pushed to the maximum.
p
can be expressed by:
1.025M
) t
h @ f
p
p
on
2 @ P
from Equation 20 gives:
until the current reaches the level imposed by
+ L
sw
P
out
h +
out
t
out
@ L
off
p
p
target is almost reached and I
@ I
+
and plugging into Equation 19 leads to:
p
1.032M
t
N @ (V
on
p
@
1
2
N @ (V
@
+
@ L
V
1
in
V
in
L
L
out
L
1
p
in
is applied across the primary
p
p
p
)
V
@ I
out
@ I
@ I
)
) V
in
p
N @ (V
) V
p
p
N @ (V
2
@ f
f
)
@ t
f
sw
)
out
1
off
out
1
) V
) V
f
)
f
)
p
(eq. 16)
(eq. 17)
(eq. 18)
(eq. 19)
(eq. 20)
is still
p
,