DS2762BE+025/T&R Maxim Integrated Products, DS2762BE+025/T&R Datasheet - Page 9

IC MON BATT LI-ION HP 16-TSSOP

DS2762BE+025/T&R

Manufacturer Part Number
DS2762BE+025/T&R
Description
IC MON BATT LI-ION HP 16-TSSOP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS2762BE+025/T&R

Function
Battery Monitor
Battery Type
Lithium-Ion (Li-Ion)
Voltage - Supply
2.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
DS2762BE+025/T&R
DS2762BE+025/TR
POWER MODES
The DS2762 has two power modes: active and sleep. While in active mode, the DS2762 continually measures
current, voltage, and temperature to provide data to the host system and to support current accumulation and Li+
safety monitoring. In sleep mode, the DS2762 ceases these activities. The DS2762 enters sleep mode when any of
the following conditions occurs:
§
§
§
The DS2762 returns to active mode when any of the following occurs:
§
§
§
§
The DS2762 defaults to active mode when power is first applied.
Li+ PROTECTION CIRCUITRY
During active mode, the DS2762 constantly monitors cell voltage and current to protect the battery from overcharge
(overvoltage), overdischarge (undervoltage), and excessive charge and discharge currents (overcurrent, short
circuit). Conditions and DS2762 responses are described in the following sections and summarized in Table 1 and
Figure 3.
Table 1. Li+ Protection Conditions and DS2762 Responses
V
Overvoltage. If the cell voltage on V
delay, t
cell voltage falls below charge enable threshold V
protection condition prevents it). Discharging remains enabled during overvoltage, and the DS2762 re-enables the
charge FET before V
Undervoltage. If the voltage of the cell drops below undervoltage threshold, V
undervoltage delay, t
Overcurrent, Discharge
Short Circuit
Overvoltage
Undervoltage
Overcurrent, Charge
IS
Note 1:
Note 2:
Note 3:
Note 4:
= V
The PMOD bit in the Status Register has been set to 1 and the DQ line is low for longer than 2s (pack
disconnection).
The voltage on V
The pack is disabled through the issuance of a SWAP command (SWEN bit = 1).
The PMOD bit has been set to 1 and the SWEN bit is set to 0 and the DQ line is pulled high (pack
connection).
The PS pin is pulled low (power switch).
The voltage on PLS becomes greater than the voltage on V
The pack is enabled through the issuance of a SWAP command (SWEN bit = 1).
IS1
CONDITION
OVD
- V
IS2
, the DS2762 shuts off the external charge FET and sets the OV flag in the protection register. When the
If V
to exceed 2.2V.
For the internal sense resistor configuration, the overcurrent thresholds are expressed in terms of current: I
direction and I
With test current I
With test current I
. Logic high = V
DD
< 2.2V, release is delayed until the recovery charge current (I
IN
IN
UVD
SNS
< V
drops below undervoltage threshold V
PLS
, the DS2762 shuts off the charge and discharge FETs, sets the UV flag in the protection
TST
TST
< -I
CE
for CC and V
flowing from PLS to V
flowing from V
THRESHOLD
OC
if a discharge current of -80mA (V
V
V
V
V
V
IS
for discharge direction.
IS
SNS
IN
IN
< -V
> V
> V
< V
> V
OC
OC
IN
OV
UV
DD
SC
(2)
(2)
exceeds the overvoltage threshold, V
for DC
DD
to PLS (pullup on PLS).
.
All voltages are with respect to V
SS
(pulldown on PLS).
ACTIVATION
DELAY
CE
t
t
t
t
t
OVD
UVD
OCD
OCD
SCD
, the DS2762 turns the charge FET back on (unless another
9 of 25
UV
IS
IN
for t
RC
≤ -2mV) or less is detected.
(charger connection) with the SWEN bit set to 0.
) passed from PLS to V
UVD
CC, DC high,
RESPONSE
CC, DC high
Sleep Mode
CC high
DC high
DC high
(cell depletion).
SS
. I
SNS
OV
references current delivered from pin SNS.
, for a period longer than overvoltage
DD
UV
charges the battery and allows V
, for a period longer than
RELEASE THRESHOLD
(charger connected)
V
V
V
PLS
PLS
PLS
V
V
V
PLS
IN
SNS
< V
> V
> V
IS
< V
≤ -2mV
> V
DD
DD
DD
> I
CE
OC
DD
- V
- V
- V
, or
(1)
for charge
TP
TP
TP
(3)
(4)
(4)
DD

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