BD3004HFP-TR Rohm Semiconductor, BD3004HFP-TR Datasheet - Page 7

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BD3004HFP-TR

Manufacturer Part Number
BD3004HFP-TR
Description
IC REG WATCHDOG TIMER HRP7
Manufacturer
Rohm Semiconductor
Datasheet

Specifications of BD3004HFP-TR

Function
Current Regulator
Accuracy
±2%
Voltage - Input
5.5 ~ 36 V
Current - Output
500mA
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
HRP-7
Threshold Voltage
4.1V
No. Of Supervisors / Monitors
1
Supply Voltage Range
5.5V To 36V
Supply Current
80µA
Digital Ic Case Style
HRP
No. Of Pins
7
Operating Temperature Range
-40°C To +125°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Sensing Method
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
10. Overcurrent protection circuit (OCP)
11. Negative surge application to Vcc pin
12. Back current flow when the Vcc power supply is suddenly interrupted
1.
2. GND voltage
3. Thermal design
4.
5. Actions in strong electromagnetic field
6. Testing on application boards
7. Regarding input pin of the IC
8. Ground Wiring Pattern
9. Thermal shutdown circuit (TSD)
Operation Notes
(Pin A)
Inter-pin shorts and mounting errors
Use caution when positioning the IC for mounting on printed circuit boards. The IC may be damaged if there is any connection error or if
pins are shorted together.
P-N junctions are formed at the intersection of these P layers with the N layers of other elements, creating a parasitic diode or transistor.
For example, the relation between each potential is as follows:
Parasitic diodes can occur inevitable in the structure of the IC. The operation of parasitic diodes can result in mutual interference among
circuits, operational faults, or physical damage. Accordingly, methods by which parasitic diodes operate, such as applying a voltage that
is lower than the GND (P substrate) voltage to an input pin, should not be used.
When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns, placing a single
ground point at the ground potential of application so that the pattern wiring resistance and voltage variations caused by large currents do
not cause variations in the small signal ground voltage. Be careful not to change the GND wiring pattern of any external components,
either.
The IC incorporates a built-in thermal shutdown circuit (TSD circuit). The thermal shutdown circuit (TSD circuit) is designed only to shut
the IC off to prevent runaway thermal operation. It is not designed to protect the IC or guarantee its operation. Do not continue to use the
IC after operating this circuit or use the IC in an environment where the operation of this circuit is assumed.. (See Fig. 12)
The IC incorporates a built-in overcurrent protection circuit that operates according to the output current capacity. This circuit serves to
protect the IC from damage when the load is shorted. The protection circuit is designed to limit current flow by not latching in the event of
a large and instantaneous current flow originating from a large capacitor or other component. These protection circuits are effective in
preventing damage due to sudden and unexpected accidents. However, the IC should not be used in applications characterized by the
continuous operation or transitioning of the protection circuits. At the time of thermal designing, keep in mind that the current capability
These ICs limit generation of back current flow when the Vcc power supply is suddenly interrupted to protect the IC from damage. Sinking
has negative characteristics to temperatures. (See Fig. 3)
The IC incorporates a built-in reverse connection breakdown prevention circuit that prevents IC damage even if Vcc carries a lower
voltage than the GND pin. However, note that the absolute maximum rating for the negative power supply voltage is -15 V.
current is also limited, making the series compatible with designs where high-capacitance capacitors are used to lengthen the amount of
time over which the output voltage can be maintained.
Absolute maximum ratings
An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can
break down the devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit. If
any over rated values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices,
such as fuses.
The potential of GND pin must be minimum potential in all operating conditions.
Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions.
Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to malfunction.
discharge capacitors after each process or step. Always turn the IC's power supply off before connecting it to or removing it from a jig or
fixture during the inspection process. Ground the IC during assembly steps as an antistatic measure. Use similar precaution when
transporting or storing the IC.
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated.
When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress. Always
N
P
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
P+
Resistor
N
GND
P
Parasitic element
P+
N
(Pin B)
Parasitic element
or transistor
Fig. 18 Example of IC structure
N
P+
C
Transistor (NPN)
7/8
N
B
P substrate
E
GND
P
P+
N
(Pin B)
(Pin A)
B
E
C
GND
Parasitic element
Parasitic element or
transistor

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