ICM7211AMIPL Intersil, ICM7211AMIPL Datasheet - Page 4

IC LCD DISPLAY DRVR 4DGT 40-DIP

ICM7211AMIPL

Manufacturer Part Number
ICM7211AMIPL
Description
IC LCD DISPLAY DRVR 4DGT 40-DIP
Manufacturer
Intersil
Datasheet

Specifications of ICM7211AMIPL

Display Type
LCD
Configuration
7 Segment
Digits Or Characters
4 Digits
Current - Supply
10µA
Voltage - Supply
3 V ~ 6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Through Hole
Package / Case
40-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Interface
-
Other names
ICM7211AMIPLIS

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Input Definitions
Interface Input Configuration
Timing Diagram
B0
B1
B2
B3
OSC
INPUT
DA1
DA2
CS1
CS2
INPUT
Digit Address
Bit 1 (LSB)
Digit Address
Bit 2 (MSB)
Chip Select 1
Chip Select 2
DESCRIPTION
DATA AND
ADDRESS
In this table, V
under Operating Characteristics. For lowest power consumption, input signals should swing over the full supply.
DIGIT
(CS2)
(CS1)
CS1
CS2
DIP TERMINAL
DIP TERMINAL
27
28
29
30
36
4
DD
31
32
33
34
and V
V
V
V
V
V
V
V
V
Floating or with External
Capacitor to V
V
FIGURE 1. MICROPROCESSOR INTERFACE INPUT
SS
DD
SS
DD
SS
DD
SS
DD
SS
SS
are considered to be normal operating input logic levels. Actual input low and high levels are specified
= Logical Zero
= Logical Zero
= Logical Zero
= Logical Zero
= Logical One
= Logical One
= Logical One
= Logical One
V
V
V
V
V
V
V
V
CONDITIONS
DD
SS
DD
SS
DD
SS
DD
SS
= DON’T CARE
CONDITIONS
= Logical Zero
= Logical Zero
= Active
= Active
= Logical One
= Logical One
= Inactive
= Inactive
DD
t
t
WI
DS
ICM7211AM
ICM7211AM
Ones (Least Significant)
Twos
Fours
Eights (Most Significant)
Oscillator Input
Disables BP output devices, allowing segments to be synchronized to an
external signal input at the BP terminal (Pin 5).
DA1 and DA2 serve as a 2-bit Digit Address Input
DA2, DA1 = 00 selects D4
DA2, DA1 = 01 selects D3
DA2, DA1 = 10 selects D2
DA2, DA1 = 11 selects D1
When both CS1 and CS2 are taken low, the data at the Data and Digit
Select code inputs are written into the input latches. On the rising edge
of either Chip Select, the data is decoded and written into the output
latches.
t
ICS
t
DH
FUNCTION
FUNCTION
Data Input Bits
April 17, 2006
FN3158.7

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