MAX6962ATH+T Maxim Integrated Products, MAX6962ATH+T Datasheet - Page 14
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MAX6962ATH+T
Manufacturer Part Number
MAX6962ATH+T
Description
IC DRVR LED 8X8 44-TQFN
Manufacturer
Maxim Integrated Products
Datasheet
1.MAX6963ATH.pdf
(35 pages)
Specifications of MAX6962ATH+T
Display Type
LED
Configuration
8 x 8 (Matrix)
Interface
4-Wire Serial
Digits Or Characters
Any Digit Type
Current - Supply
7.5mA
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
44-TQFN Exposed Pad
Number Of Segments
64
Low Level Output Current
750 mA
High Level Output Current
48 mA
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Supply Current
9 mA
Maximum Power Dissipation
2162 mW
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
4-Wire Serially Interfaced
8 x 8 Matrix Graphic LED Drivers
Figure 9. 16-Bit Read from the MAX6960–MAX6963
Figure 10. 24-Bit Read from the MAX6960–MAX6963
4) Take CS high (while CLK is still high after clocking
5) Take CLK low.
Any register data within the MAX6960 may be read by
sending a logic-high to bit D15. The sequence is:
1) Take CLK low.
2) Take CS low.
3) For a 16-bit transmission:
14
DOUT
CLK
DIN
CS
observing the setup and hold times. Bit D15 is low,
indicating a write command.
For a 24-bit transmission:
Clock 24 bits of data into DIN, D23 first to D0 last,
observing the setup and hold times. Bit D23 is low,
indicating a write command.
in the last data bit).
Clock 16 bits of data into DIN, D15 first to D0 last,
observing the setup and hold times. Bit D15 is high,
indicating a read command. Bits D7 to D0 are
dummy bits, and are discarded by the MAX6960.
For a 24-bit transmission: Clock 24 bits of data into
DIN, D23 first to D0 last, observing the setup and
DOUT
______________________________________________________________________________________
CLK
DIN
CS
TRI-STATE
D23
= 1
TRI-STATE
D22
D15
= 1
D21
D14
D20
D13
D19
D18
D12
Reading Device Registers
D17
D11
D16
D10
D15
D14
D9
D13
D8
D12
D7
D11
D6
D10
D5
D9
D8
D4
4) Take CS high (while CLK is still high after clocking
5) Take CLK low.
6) The selected MAX6960’s DOUT is enabled from tri-
7) Clock 8 bits of data from DOUT, D7 first to D0 last,
8) Take CLK low after the final (8th) data bit.
The selected MAX6960’s DOUT returns to tri-state.
Figure 10 shows a read operation when 24 bits are
transmitted and 8 bits are read back.
The MAX6960 uses a 3-wire interface to bus together
up to 256 MAX6960s. The 3-wire bus enables each
device to calculate its own unique driver address
(0 to 255), and reconfigure its display memory. The
ADDOUT output also provides an interrupt at every
page change, when the plane counter is configured to
automatic (Table 30).
D7
D3
hold times. Bit D23 is high, indicating a read com-
mand. Bits D7 to D0 are dummy bits, and are dis-
carded by the MAX6960.
in the last data bit).
state for read back.
observing the setup and hold times.
D6
D2
D5
D1
Local 3-Wire Serial Interface
D4
D3
D0
D2
D7
D1
D6
D0
D5
D7
D4
D6
D5
D3
D4
D2
D3
D1
D2
D0
D1
D0
.
.