LTC4252A-2IMS#TR Linear Technology, LTC4252A-2IMS#TR Datasheet - Page 19

IC CTRLR HOTSWAP NEG VOLT 10MSOP

LTC4252A-2IMS#TR

Manufacturer Part Number
LTC4252A-2IMS#TR
Description
IC CTRLR HOTSWAP NEG VOLT 10MSOP
Manufacturer
Linear Technology
Type
Hot-Swap Controllerr
Datasheets

Specifications of LTC4252A-2IMS#TR

Applications
General Purpose
Internal Switch(s)
No
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
Family Name
LTC4252A-2
Package Type
MSOP
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Product Depth (mm)
3mm
Product Height (mm)
0.86mm
Product Length (mm)
3mm
Mounting
Surface Mount
Pin Count
10
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Price
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Part Number:
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APPLICATIO S I FOR ATIO
A low impedance short on one card may influence the
behavior of others sharing the same backplane. The initial
glitch and backplane sag as seen in Figure 6 Trace 1, can
rob charge from output capacitors on adjacent cards.
When the faulty card shuts down, current flows in to
refresh the capacitors. If LTC4252s are used by the other
cards, they respond by limiting the inrush current to a
value of 100mV/R
will recharge long before C
POWER GOOD, PWRGD
PWRGD latches low if GATE charges up to within 2.8V of
V
is reset in UVLO, in a UV condition or if C
4V. An overvoltage condition has no effect on PWRGD
status. A 58µA current pulls this pin high during reset. Due
to voltage transients between the power module and
PWRGD, optoisolation is recommended. This pin pro-
vides sufficent drive for an optocoupler. Figure 19 shows
an alternative NPN configuration with a limiting base
resistor for the PWRGD interface. The module enable
input should have protection from the negative input
current.
MOSFET SELECTION
The external MOSFET switch must have adequate safe
operating area (SOA) to handle short-circuit conditions
until TIMER times out. These considerations take prece-
dence over DC current ratings. A MOSFET with adequate
SOA for a given application can always handle the required
current, but the opposite may not be true. Consult the
manufacturer’s MOSFET data sheet for safe operating area
and effective transient thermal impedance curves.
MOSFET selection is a 3-step process by assuming the
absense of a soft-start capacitor. First, R
then the time required to charge the load capacitance is de-
termined. This timing, along with the maximum short-cir-
cuit current and maximum input voltage defines an oper-
ating point that is checked against the MOSFET’s SOA curve.
IN
and DRAIN pulls below V
S
. If C
U
T
is sized correctly, the capacitors
U
T
DRNL
times out.
during start-up. PWRGD
W
S
is calculated and
T
charges up to
U
To begin a design, first specify the required load current
and Ioad capacitance, I
current trip point (V
the maximum load current. Note that maximum input
current to a DC/DC converter is expected at V
R
where V
the guaranteed minimum circuit breaker threshold.
During the initial charging process, the LTC4252 may
operate the MOSFET in current limit, forcing (V
tween 80mV to 120mV (V
LTC4252A) across R
given by:
Maximum short-circuit current limit is calculated using
the maximum V
The TIMER capacitor C
slowest expected charging rate; otherwise TIMER might
time out before the load capacitor is fully charged. A value
for C
load capacitor to charge. That time is given by:
The maximum current flowing in the DRAIN pin is given
by:
S
R
I
I
I
t
is given by:
DRN MAX
INRUSH MIN
SHORTCIRCUIT MAX
CL CHARGE
S
T
LTC4252A-1/LTC4252A-2
is calculated based on the maximum time it takes the
(
=
(
CB(MIN)
V
I
CB MIN
L MAX
(
(
)
LTC4252-1/LTC4252-2
(
=
)
)
=
= 40mV (45mV for LTC4252A) represents
=
V
)
ACL
)
(
80
SUPPLY MAX
C V
R
. This gives
CB
I
mV
S
S
/R
)
. The minimum inrush current is
=
T
=
S
120
(
L
) should be set to accommodate
must be selected based on the
C V
R
R
and C
L
D
ACL
mV
S
I
)
INRUSH MIN
SUPPLY MAX
V
is 54mV to 66mV for
L
DRNCL
. The circuit breaker
(
(
)
)
SUPPLY(MIN)
ACL
19
425212fb
) be-
(10)
(11)
(12)
(8)
(9)
.

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