LTC4252A-2IMS#TR Linear Technology, LTC4252A-2IMS#TR Datasheet - Page 30

• Manufacturer Part Number: LTC4252A-2IMS#TR
• Description: IC CTRLR HOTSWAP NEG VOLT 10MSOP
• Manufacturer: Linear Technology
• Type: Hot-Swap Controllerr

Specifications of LTC4252A-2IMS#TR

• Applications: General Purpose
• Internal Switch(s): No
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
• Family Name: LTC4252A-2
• Package Type: MSOP
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Product Depth (mm): 3mm
• Product Height (mm): 0.86mm
• Product Length (mm): 3mm
• Mounting: Surface Mount
• Pin Count: 10
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

APPLICATIO S I FOR ATIO
LTC4252-1/LTC4252-2
LTC4252A-1/LTC4252A-2
Circuit Breaker with Foldback Current Limit
Figure 20 shows the LTC4252A in a foldback current limit
application. When V
supply, current flows through resistors R4 and R5. This
results in a voltage drop across R5 and a corresponding
reduction in voltage drop across the sense resistor, R
the ACL amplifier servos the sense voltage between the
SENSE and V
current through R
during an output short-circuit condition. Without foldback
current limiting resistor R5, the current is limited to 3A
during analog current limit. With R5, the short-circuit
current is limited to 0.5A when V
Inrush Control Without a Sense Resistor
During Power-Up
Figure 21 shows the LTC4252A in an application where the
inrush current is controlled without a sense resistor dur-
ing power-up. This setup is suitable only for applications
that don’t require short-circut protection from the
LTC4252A. Resistor R4 and capacitor C2 act as a feedback
network to accurately control the inrush current. The C2
capacitor can be calculated with the following equation:
where I
30
C
2 =
GATE
I
GATE
I
INRUSH
= 58µA and C
EE
•
(SHORT PIN)
C
pins to about 60mV. The short-circuit
L
S
reduces as the V
U
–48V
GND
GND
OUT
*FMMT493
30.1k
390k
U
1%
1%
is shorted to the –48V RTN
L
R1
R2
is the total load capacitance.
OUT
C1
10nF
OUT
W
Figure 19. Power Limit Circuit Breaking Application
is shorted to 71V.
voltage increases
C
0.68µF
T
10
9
8
3
U
UV
OV
TIMER
SS
C
68nF
SS
LTC4252A-1
S
(19)
, as
V
V
EE
IN
5
1
R
3× 1.8k
1/4W EACH
IN
PWRGD
SENSE
DRAIN
GATE
Capacitor C3 and resistor R4 prevent Q1 from momen-
tarily turning on when the power pins first make contact.
Without C3 and R4, capacitor C2 pulls the gate of Q1 up to
a voltage roughly equal to V
LTC4252A powers up. By placing capacitor C3 in parallel
with the gate capacitance of Q1 and isolating them from C2
using resistor R4, the problem is solved. The value of C3
is given by:
where V
old and V
voltage.
Diode-ORing
Figure 22 shows the LTC4252 used as diode-oring with
Hot Swap capability in a dual – 48V power supply applica-
tion. The conventional diode-OR method uses two high
power diodes and heat sinks to contain the large heat
dissipation of the diodes. With the LTC4252 controlling
the external FETs Q2 and Q3 in a diode-OR manner, the
small turn-on voltage across the fully enhanced Q2 and Q3
reduces the power dissipation significantly.
2
7
6
4
C3 ≈ 35 • C2 for V
C
3
=
C
1µF
IN
GS(TH),Q1
V
SUPPLY MAX
SUPPLY(MAX)
V
R4
38.3k
D1
BZV85C43
GS TH Q
R
10Ω
(
C
C
10nF
C
(
),
is the MOSFET’s minimum gate thresh-
R6 27Ω
R
D
1
1M
SUPPLY(MAX)
R5
100k
)
is the maximum operating input
•
*
(
C
2
+
+
EE
C
4252-1/2 F19
Q1
IRF530S
V
R
0.02Ω
OUT
GD Q
S
• C2/C
C
100µF
L
= 71V
( )
EN
LOAD
1
)
GS(Q1)
before the
425212fb
(20)