LM5067MMX-2/NOPB National Semiconductor, LM5067MMX-2/NOPB Datasheet - Page 16
![IC CTLR NEG HOTSWAP A/R 10MSOP](/photos/6/60/66087/pkg_mub10a_sml.jpg)
LM5067MMX-2/NOPB
Manufacturer Part Number
LM5067MMX-2/NOPB
Description
IC CTLR NEG HOTSWAP A/R 10MSOP
Manufacturer
National Semiconductor
Type
Hot-Swap Controllerr
Datasheet
1.LM5067MM-1NOPB.pdf
(24 pages)
Specifications of LM5067MMX-2/NOPB
Applications
General Purpose
Internal Switch(s)
No
Voltage - Supply
-9 V ~ -80 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
Linear Misc Type
Negative Voltage
Family Name
LM5067-2
Package Type
MSOP
Operating Supply Voltage (min)
-9V
Operating Supply Voltage (max)
-80V
Operating Temperature (min)
-40C
Operating Temperature (max)
125C
Operating Temperature Classification
Automotive
Product Depth (mm)
3mm
Product Height (mm)
0.86mm
Product Length (mm)
3mm
Mounting
Surface Mount
Pin Count
10
For Use With
LM5067EVAL - NEGATIVE HOT SWAP / INRUSH CURRE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
LM5067MMX-2
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LM5067MMX-2/NOPB
Manufacturer:
TI
Quantity:
4 500
www.national.com
B) Turn-on with power limit and current limit: The power
dissipation limit in Q1 (P
the PWR pin, and the current sense resistor R
FIGURE 9. Load Draws Current During Turn-On
FET(LIM)
) is defined by the resistor at
FIGURE 10. MOSFET Power Up Waveforms
30030939
S
. See the
16
Power Limit Threshold section. If the current limit threshold
(I
threshold at maximum V
ates initially in power limit mode when the V
and then transitions to current limit mode as the current in-
creases to I
the load (R
output voltage to reach its final value is approximately equal
to:
For example, if V
P
rent level (I
Period must be set longer than t
LIM
FET(LIM)
) is higher than the current defined by the power limit
= 20W, t
L
LIM
) is not connected during turn-on, the time for the
P
) is approximately 0.42A. The Fault Timeout
as V
ON
SYS
DS
calculates to
= -48V, C
decreases. See Figure 10b. Assuming
DS
(P
FET(LIM)
L
≊
= 1000 µF, I
ON
68 ms, and the initial cur-
.
/V
SYS
) the circuit oper-
DS
30030941
LIM
of Q1 is high,
= 1A, and