X9530V14I Intersil, X9530V14I Datasheet
X9530V14I
Specifications of X9530V14I
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X9530V14I Summary of contents
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... PART PART NUMBER MARKING X9530V14I* X9530V X9530V14IZ* X9530V Z (Note) *Add "T1" suffix for tape and reel. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations ...
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... Programmable Current Generators are ideal for use in fiber optic Modulation Current require temperature control. The combination of the X9530 functionality and Intersil’s Chip-Scale package lowers system cost, increases reliability, and reduces board space requirements. Two on-chip Programmable Current Generators may be independently programmed to either sink or source current ...
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... The resolution is 8 bits. 3 X9530 The EEPROM array is internally organized as 272 x 8 bits with 16-Byte pages, and utilizes Intersil’s proprietary Direct Write™ cells, providing a minimum endurance of 100,000 Page Write cycles and a minimum data retention of 100 years. ...
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PRINCIPLES OF OPERATION CONTROL AND STATUS REGISTERS The Control and Status Registers provide the user with a mechanism for changing and reading the value of various parameters of the X9530. The X9530 contains seven Control, one Status, and several Reserved ...
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Figure 1. Control and Status Register Format Byte MSB Address 6 7 80h I2DS I1DS Non-Volatile I1 and I2 Direction 0: Source 1: Sink Direct Access to LUT1 81h Volatile or Reserved Reserved Non-Volatile Direct Access to LUT2 82h Volatile ...
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I2DS URRENT ENERATOR IRECTION ( VOLATILE The I2DS bit sets the polarity of Current Generator 2, DAC2. When this bit is set to “0” (default), the Current Generator 2 of the X9530 is ...
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I2FSO1–I2FSO0 URRENT ENERATOR CALE UTPUT URRENT ET These two bits are used to set the full scale output current at the Current Generator 2 pin, I2. If both bits are set to “0” ...
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VOLTAGE REFERENCE The voltage reference to the A/D and D/A converters on the X9530, may be driven from the on-chip voltage reference, or from an external source via the VRef pin. Bit VRM in Control Register 0 selects between the ...
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Figure 4. A/D Converter Input Select Structure ADCIN: bit 3 in Control register 0. VSense Pin On-chip Temperature Sensor VRef A/D Converter Range From Figure 3 we can see that the operating range of the A/D converter input depends on ...
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Figure 5. D/A Converter Block Diagram VRef Voltage DAC1 or Divider DAC2 Input byte or I2FSO[1:0] bits 1 and and 2 in Control Figure 6. Look-up Table (LUT) Operation LUT2 Row Selection bits D0h LUT1 Row Selection ...
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By examining the block diagram in Figure 5, we see that the maximum current through pin I1 is set by fixing values for V(VRef) and R1. The output current can then be varied by changing the data byte at the ...
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D/A Converter 1 Access Summary L1DAS D1DAS Control Source 0 0 A/D converter through LUT1 (Default Bits L1DA5 - L1DA0 through LUT1 X 1 Bits D1DA7 - D1DA0 “X” = Don’t Care Condition (May be either “1” or ...
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Figure 8. D/A Converter Power-on Reset Response Voltage V ADCOK 0V Current I x 10% x Serial Clock and Data Data states on the SDA line can change only while SCL is LOW. SDA state changes while SCL is HIGH ...
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Figure 9. Valid Start and Stop Conditions SCL SDA Figure 10. Valid Data Changes on the SDA Bus SCL SDA Figure 11. Acknowledge Response From Receiver SCL from Master SDA Output from Transmitter SDA Output from Receiver START 14 X9530 ...
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X9530 Memory Map The X9530 contains a 2176 bit array of mixed volatile and nonvolatile memory. This array is split up into four distinct parts, namely: (Refer to Figure 12.) – General Purpose Memory (GPM) – Look-up Table 1 (LUT1) ...
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Slave Address Byte Following a START condition, the master must output a Slave Address Byte (Refer to Figure 13.). This byte includes three parts: – The four MSBs (SA7 - SA4) are the Device Type Identifier, which must always be ...
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Figure 15. Byte Write Sequence Signals from the Master Signal at SDA Signals from the Slave Page Write Operation The 2176-bit memory array is physically realized as one contiguous array, organized as 17 pages of 16 bytes each. In order ...
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Figure 17. Example: Writing 12 bytes to a 16-byte page starting at location 11. 7 bytes Address=0 The four registers Control 1 through 4, have a nonvolatile and a volatile cell for each bit. At power-up, the content of the ...
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Figure 19. Read Sequence S Slave Signals t Address from the a with Master r R Signal SDA Signals from the Slave The Data Bytes are from the memory location indicated ...
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... SFF this memory may be used for the storage of transceiver module parameters. input of the laser diode circuit. By loading the or I parameters. The example in Figure PINSET parameter, while PINSET is set at a fixed value using a Intersil Digital of the driver circuit BIASET November 11, 2005 over MON FN8211.1 ...
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... Figure 20. Typical Laser Driver Circuit Topology High Speed Data Input I MODSET I BIASSET I PINSET Figure 21. X9530 Application Example Block Diagram High Speed Data Input X9530 INTERSIL XDCP MOD_DEF SDA (0) MOD_DEF SCK (1) 21 X9530 Laser Diode Driver Circuit Modulation Currrent Generation I I BIASMAX BIAS Σ ...
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ABSOLUTE MAXIMUM RATINGS All voltages are referred to Vss. Temperature under bias ................... -65°C to +100°C Storage temperature ........................ -65°C to +150°C Voltage on every pin except Vcc ................ -1.0V to +7V Voltage on Vcc Pin .............................................0 to 5.5V ...................... ...
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ELECTRICAL CHARACTERISTICS All typical values are for 25°C ambient temperature and pin Vcc. Maximum and minimum specifications are over the recommended operating conditions. All voltages are referred to the voltage at pin Vss unless otherwise specified. All ...
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D/A CONVERTER CHARACTERISTICS All typical values are for 25°C ambient temperature and pin Vcc. Maximum and minimum specifications are over the recommended operating conditions. All voltages are referred to the voltage at pin Vss unless otherwise specified. ...
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A/D CONVERTER CHARACTERISTICS All typical values are for 25°C ambient temperature and pin Vcc. Maximum and minimum specifications are over the recommended operating conditions. All voltages are referred to the voltage at pin Vss unless otherwise specified. ...
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INTERFACE A.C. CHARACTERISTICS Symbol Parameter f SCL Clock Frequency SCL (4) t Pulse width Suppression Time at IN inputs (4) t SCL Low to SDA Data Out Valid AA (4) t Time the bus free before start of new ...
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TIMING DIAGRAMS Figure 22. Bus Timing t F SCL t SU:DAT t SU:STA t HD:STA SDA IN SDA OUT Figure 23. WP Pin Timing START SCL SDA IN WP Figure 24. Non-Volatile Write Cycle Timing SCL SDA 8th bit of ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...