AD9660KR Analog Devices Inc, AD9660KR Datasheet - Page 11

• Manufacturer Part Number: AD9660KR
• Description: IC LASER DIODE DRIVER 28-SOIC
• Manufacturer: Analog Devices Inc
• Type: Laser Diode Driverr

Specifications of AD9660KR

• Number Of Channels: 1
• Rohs Status: RoHS non-compliant
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 110mA
• Current - Modulation: 60mA
• Current - Bias: 90mA
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-SOIC (0.300", 7.50mm Width)
• Mounting Type: Surface Mount
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Compliant

REV. 0
The trace from the output pins of the AD9660 to the anode of
the laser (send trace) should be several millimeters wide and
should be as direct as possible. The return current will choose
the path of least resistance. If the return path is the ground
plane, it should have an unbroken path, under the output trace,
from the laser cathode back to the AD9660. If the return path is
not the ground plane (such as on a two layer board, or on the
+V
plane of the output trace. If the current cannot return along a
path that follows the output trace, the inductance will be drasti-
cally increased and performance will be degraded.
Optimizing the Feedback Layout
In applications where the dynamic performance of the analog
feedback loop is important, it is necessary to optimize the layout
of the gain resistor, R
SENSE IN. Such applications include MOD systems which
recalibrate the write loop on pulses as short as 25 ns, and closed
loop applications.
S
plane), it should still be on the board plane adjacent to the
GAIN
AD9660
, as well as the monitor current path to
5
OUTPUT PIN CONNECTIONS
+V
S
PIN CONNECTIONS
CONNECTIONS
GROUND PIN
Figure 11. Laser Diode Current Loop
PIN ASSIGNMENTS
25
24
23
22
21
20
19
–11–
BYPASS CAPS
GROUND PLANE
REDUCES INDUCTANCE
The best possible TZA settling will be achieved by using a
single carbon surface mount resistor (usually 5% tolerance) for
R
GAIN pin (Pin 9) is essentially connected to the inverting input
of the TZA, it is very sensitive to stray capacitance. R
should be placed between Pin 9 and Pin 10, as close as possible
to Pin 9. Small traces should be used, and the ground and +V
planes adjacent to the trace should be removed to further mini-
mize stray capacitance.
The trace from SENSE IN to the cathode of the PIN photo-
detector should be thin and routed away from the laser anode
trace.
MUTUAL COUPLING
4
GAIN
and small surface mount capacitor for C
LASER DIODE CURRENT
PATH SEGMENTS
1
3
(SEE TEXT)
2
GAIN
AD9660
. Because the
GAIN
S