AD9660KR Analog Devices Inc, AD9660KR Datasheet - Page 8

• Manufacturer Part Number: AD9660KR
• Description: IC LASER DIODE DRIVER 28-SOIC
• Manufacturer: Analog Devices Inc
• Type: Laser Diode Driverr

Specifications of AD9660KR

• Number Of Channels: 1
• Rohs Status: RoHS non-compliant
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 110mA
• Current - Modulation: 60mA
• Current - Bias: 90mA
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-SOIC (0.300", 7.50mm Width)
• Mounting Type: Surface Mount
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Compliant

AD9660
Using this model, the voltage at the hold capacitor is
where t
CAL goes logic HIGH), V
t = 0, V
loop closed, and = R
model the error in V
pared to V
chart:
0
t =
V
is when the calibration begins (WRITE CAL or BIAS
t
7
6
5
4
3
2
100
C
CALIBRATION
90
80
70
60
50
40
30
20
10
t =
HOLD
0
is the steady state voltage at the hold cap with the
0
, can be estimated from the following table and
Figure 8. Calibration Time Curve
V
t
C HOLD
CALIBRATION TIME – Time Constants =
1
0
C HOLD
(V
t = 0
% Final Value
99.9
99.7
99.2
98.1
95.0
86.5
63.2
for a finite calibration time, as com-
Table II.
t
is the time constant. With this
2
is the voltage on the hold cap at
V
t
3
0
) 1 e
Error %
0.09
0.25
0.79
1.83
4.97
13.5
36.8
4
t
5
–8–
Initial calibration is required after power-up or any other time
the laser has been disabled. Disabling the AD9660 drives the
hold capacitors back down to V
where the output current is more than 10% out of calibration, R
will range from 300
value should be used for calculating the worst case calibration
time. Following the example above, if C
4.5 nF, then = RC = 550
initial calibration error <1%, the initial calibration time should
be >5 = 12.4 s.
Initial calibration time will actually be better than this calcula-
tion indicates, as a significant portion of the calibration time will
be within 10% of the final value, and the output resistance in
the AD9660’s T/H decreases as the hold voltage approaches its
final value.
Recalibration is functionally identical to initial calibration, but
the loop need only correct for droop. Because droop is assumed
to be a small percentage of the initial calibration (<10%), the
resistance for the model above will be in the range of 75
140 . Again, the higher value should be used to estimate the
worst case time needed for recalibration.
Continuing with the example above, since the error during hold
time was chosen as 5%, we meet the criteria for recalibration
and = RC = 140
1% after recalibration, the 5% droop must be corrected to
within a 20% error (20% 5% = 1%). A 2 recalibration time
of 1.26 s is sufficient.
Continuous Recalibration
In applications where the hold capacitor is small (<500 pF) and
the WRITE PULSE signals always have a pulse width >25 ns,
the user may continuously calibrate the write loop. In such an
application, the WRITE CAL signal should be held logic
HIGH, and the WRITE PULSE signal will control write loop
calibration via the internal AND gate.
The bias loop may be continuously recalibrated whenever
WRITE PULSE is logic LOW.
to 550
4.5 nF = 0.63 s. To get a final error of
REF
4.5 nF would be 2.5 s. For an
for the model above; the higher
. In this case, or in any case
HOLD
were chosen as
REV. 0
to