ISL97672IRZ Intersil, ISL97672IRZ Datasheet - Page 11

• Manufacturer Part Number: ISL97672IRZ
• Description: IC LED DVR PWM CTRL 6CH 20QFN
• Manufacturer: Intersil

Specifications of ISL97672IRZ

• Constant Current: *
• Constant Voltage: *
• Topology: PWM, Step-Up (Boost)
• Number Of Outputs: 6
• Internal Driver: Yes
• Type - Primary: Automotive, Backlight
• Frequency: 200kHz ~ 1.5MHz
• Voltage - Supply: 4.5 V ~ 26.5 V
• Voltage - Output: *
• Mounting Type: Surface Mount
• Package / Case: 20-VFQFN Exposed Pad
• Operating Temperature: -40°C ~ 85°C
• Current - Output / Channel: 40mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

enhancement and enabling open circuit operation. When
this type of LED is open circuited, the effect is as if the
LED forward voltage has increased but no lighting. Any
affected string will not be disabled, unless the failure
results in the boost OVP limit being reached, allowing all
other LEDs in the string to remain functional. Care should
be taken in this case that the boost OVP limit and SCP
limit are set properly, so as to make sure that multiple
failures on one string do not cause all other good
channels to be faulted out. This is due to the increased
forward voltage of the faulty channel making all other
channels look as if they have LED shorts. See Table 1 for
details regarding responses to fault conditions.
Overvoltage Protection (OVP)
The integrated OVP circuit monitors the output voltage
and keeps the voltage at a safe level. The OVP threshold
is set as Equation 5:
These resistors should be large to minimize the power
loss. For example, a 1MkΩ R
OVP to 41.2V. Large OVP resistors also allow C
discharges slowly during the PWM Off time. Parallel
capacitors should also be placed across the OVP resistors
such that R
C
capacitors reduce the AC impedance of the OVP node,
which is important when using high value resistors.
Undervoltage Lockout
If the input voltage falls below the UVLO level of 2.45V, the
device will stop switching and be reset. Operation will
restart only if the V
Input Overcurrent Protection
During normal switching operation, the current through
the internal boost power FET is monitored. If the current
OVP
UPPER
=
1.21V
value of at least 30pF is recommended. These
UPPER
×
(
R
UPPER
/R
IN
LOWER
is back in the normal operating range.
+
R
= C
LOWER
11
UPPER
LOWER
) R
⁄
and 30kΩ R
/C
LOWER
UPPER
. Using a
LOWER
OUT
(EQ. 5)
ISL97672
sets
exceeds the current limit, the internal switch will be
turned off. This monitoring happens on a cycle-by-cycle
basis in a self protecting way.
Additionally, the ISL97672 monitors the voltage at the LX
and OVP pins. At start-up, a fixed current is injected out
of the LX pins and into the output capacitor. The device
will not start-up unless the voltage at LX exceeds 1.2V.
The OVP pin is also monitored such that if it rises above
and subsequently falls below 20% of the target OVP
level, the input protection FET will also be switched off.
Over-Temperature Protection (OTP)
The ISL97672 includes two over-temperature thresholds.
The lower threshold is set to +130°C. When this
threshold is reached, any channel which is outputting
current at a level significantly below the regulation target
will be treated as “open circuit” and disabled after a time-
out period. This time-out period is also reduced to 800µs
when it is above the lower threshold. The intention of the
lower threshold is to allow bad channels to be isolated
and disabled before they cause enough power dissipation
(as a result of other channels having large voltages
across them) to hit the upper temperature threshold.
The upper threshold is set to +150°C. Each time this is
reached, the boost will stop switching and the output
current sources will be switched off. Once the device has
cooled to approximately +100°C, the device will restart
with the DC LED current level reduced to 75% of the
initial setting. If the dissipation problem persists,
subsequent hitting of the limit will cause identical
behavior, with the current reduced in steps to 50% and
finally 25%. Unless disabled via the EN pin, the device
stays in an active state throughout.
For the extensive fault protection conditions, please refer
to Figure 20 and Table 1 for details.
November 1, 2010
FN7632.1