DS3881E+T&R/C Maxim Integrated Products, DS3881E+T&R/C Datasheet - Page 15

• Manufacturer Part Number: DS3881E+T&R/C
• Description: IC AUTO CCFL CTRLR 1CH 24-TSSOP
• Manufacturer: Maxim Integrated Products
• Type: CCFL Controllerr

Specifications of DS3881E+T&R/C

• Frequency: 40 ~ 100 kHz
• Current - Supply: 12mA
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 24-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output: -
• Lead Free Status / Rohs Status: Details

Figure 8 shows a flowchart of how the DS3881 controls
and monitors each lamp. The steps are as follows:
1) Supply Check—The lamps do not turn on unless the
2) Strike Lamp—When both the DS3881 and the DC
3) Run Lamp—Once the lamp is struck, the DS3881
DS3881 supply voltage is above 4.3V and the volt-
age at the supply voltage monitors, SVML and SVMH,
are respectively above 2.0V and below 2.0V.
inverter supplies are at acceptable levels, the
DS3881 attempts to strike the lamp. The DS3881
slowly ramps up the MOSFET gate duty cycle until
the lamp strikes. The controller detects that the lamp
has struck by detecting current flow in the lamp,
detected by the LCM1 pin. If during the strike ramp,
the maximum allowable voltage is reached on the
OVD1 pin, the controller stops increasing the MOS-
FET gate duty cycle to keep from overstressing the
system. The DS3881 goes into a fault handling state
(step 4) if the lamp has not struck after the timeout
period as defined by the LST0 and LST1 control bits
in the SSP1 register. If an overvoltage event is detect-
ed during the strike attempt, the DS3881 disables the
MOSFET gate drivers and go into the fault handling
state.
adjusts the MOSFET gate duty cycle to optimize the
lamp current. The gate duty cycle is always con-
strained to keep the system from exceeding the
maximum allowable lamp voltage. The lamp current
Single-Channel Automotive CCFL Controller
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4) Fault Handling—During fault handling, the DS3881
• V
• The SVML or SVMH thresholds are crossed.
• The PDN pin goes high.
• The PDNE software bit is written to a logic 1.
• The channel is disabled by the CH1D control bit.
sampling rate is user-selectable using the LSR0 and
LSR1 bits in CR2. If lamp current ever drops below the
lamp out reference point for the period as defined by
the LST0 and LST1 control bits in the SSP1 register,
then the lamp is considered extinguished. In this case,
the MOSFET gate drivers are disabled and the device
moves to the fault handling stage.
performs an optional (user-selectable) automatic
retry to attempt to clear all faults except a lamp over-
current. The automatic retry makes 14 additional
attempts to rectify the fault before declaring the
channel in a fault state and permanently disabling
the channel. Between each of the 14 attempts, the
controller waits 1024 lamp cycles. In the case of a
lamp overcurrent, the DS3881 instantaneously
declares the channel to be in a fault state and per-
manently disables the channel. Once a fault state is
entered, the channel remains in that state until one of
the following occurs:
CC
drops below the UVLO threshold.
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