L6390D STMicroelectronics, L6390D Datasheet - Page 15

• Manufacturer Part Number: L6390D
• Description: IC DRIVER HV HI/LOW SIDE SOIC-16
• Manufacturer: STMicroelectronics
• Type: High Side/Low Sider

Specifications of L6390D

• Configuration: Half Bridge
• Input Type: Inverting and Non-Inverting
• Delay Time: 125ns
• Current - Peak: 290mA
• Number Of Configurations: 1
• Number Of Outputs: 2
• High Side Voltage - Max (bootstrap): 600V
• Voltage - Supply: 12.5 V ~ 20 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (3.9mm Width)
• Product: H-Bridge Drivers
• Rise Time: 120 ns
• Fall Time: 70 ns
• Supply Voltage (min): 12.5 V
• Supply Current: 290 mA
• Maximum Power Dissipation: 800 mW
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Bridge Type: Half Bridge
• Minimum Operating Temperature: - 40 C
• Number Of Drivers: 1
• For Use With: 497-10543 - BOARD EVAL L6390/STD5N52U497-8404 - BOARD EVAL L6390/STD5NK52ZD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

L6390
Smart shut down function
In common over-current protection architectures the comparator output is usually connected
to the SD input and an RC network is connected to this SD/OD line in order to provide a
mono-stable circuit, which implements a protection time that follows the fault condition.
Differently from the common fault detection systems, L6390 Smart shut down architecture
allows to immediately turn-off the outputs gate driver in case of fault, by minimizing the
propagation delay between the fault detection event and the actual outputs switch-off. In fact
the time delay between the fault and the outputs turn off is no more dependent on the RC
value of the external network connected to the pin. In the smart shut down circuitry, the fault
signal has a preferential path which directly switches off the outputs after the comparator
triggering. At the same time the internal logic turns on the open drain output and holds it on
until the SD voltage goes below the SD logic input lower threshold. The Smart shut down
system provides the possibility to increase the time constant of the external RC network
(that is the disable time after the fault event) up to very large values without increasing the
delay time of the protection.
Any external signal provided to the SD pin is not latched and can be used as control signal
in order to perform, for instance, PWM chopping through this pin. In fact when a PWM signal
is applied to the SD input and the logic inputs of the gate driver are stable, the outputs
switch from the low level to the state defined by the logic inputs and vice versa.
Doc ID 14493 Rev 5
15/22