NUD3105DMT1G ON Semiconductor, NUD3105DMT1G Datasheet - Page 6

MOSFET N-CH DUAL 6V 500MA SC74-6

NUD3105DMT1G

Manufacturer Part Number
NUD3105DMT1G
Description
MOSFET N-CH DUAL 6V 500MA SC74-6
Manufacturer
ON Semiconductor
Type
Low Sider
Datasheet

Specifications of NUD3105DMT1G

Input Type
Non-Inverting
Number Of Outputs
2
On-state Resistance
1.2 Ohm
Current - Output / Channel
400mA
Current - Peak Output
500mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
SC-74-6
Configuration
Dual
Transistor Polarity
N-Channel
Resistance Drain-source Rds (on)
0.9 Ohm @ 5 V
Drain-source Breakdown Voltage
6 V
Gate-source Breakdown Voltage
6 V
Continuous Drain Current
0.5 A
Power Dissipation
380 mW
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Supply Voltage Max
6V
No. Of Outputs
2
Output Voltage
6V
Output Current
400mA
Driver Case Style
SC-74
Device Type
Relay
Termination Type
SMD
No. Of Pins
6
Rohs Compliant
Yes
Supply Voltage Min
3V
Peak Reflow Compatible (260 C)
Yes
Leaded Process Compatible
Yes
Filter Terminals
SMD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
NUD3105DMT1GOS
NUD3105DMT1GOS
NUD3105DMT1GOSTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
NUD3105DMT1G
Manufacturer:
ON
Quantity:
1 305
Part Number:
NUD3105DMT1G
Manufacturer:
ON/安森美
Quantity:
20 000
1. Determine the maximum inductive load current (at
2. For pulsed operation, use the Transient Thermal
3. Use Figures 10 and 11 with the SOA notes to
+3.0 ≤ V
max V
temperature) that the NUD3105D will have to
drive and make sure it is less than the max rated
current.
Response of Figure 11 and the instructions with it
to determine the maximum limit on transistor
power dissipation for the desired duty cycle and
temperature range.
insure that instantaneous operation does not push
the device beyond the limits of the SOA plot.
Designing with this Data Sheet
CC
DD
V
in
, min coil resistance & usually minimum
≤ +3.75 Vdc
(2)
Figure 12. A 200 mW, 5.0 V Dual Coil Latching Relay Application
with 3.0 V Level Translating Interface
GND (1)
V
+4.5 ≤ V
out
APPLICATIONS DIAGRAMS
(6)
http://onsemi.com
CC
NUD3105DDMT1
≤ +5.5 Vdc
+
6
+
4. Verify that the circuit driving the gate will meet
5. Using the max output current calculated in step 1,
6. Use I
7. Review circuit operation and insure none of the
the V
table.
check Figure 7 to insure that the range of Zener
clamp voltage over temperature will satisfy all
system & EMI requirements.
Characteristics table to insure that “OFF” state
leakage over temperature and voltage extremes
does not violate any system requirements.
device max ratings are being exceeded.
GND (4)
V
out
GSS
GS(th)
(3)
and I
from the Electrical Characteristics
DSS
from the Electrical
V
in
(5)

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