TLE7233G Infineon Technologies, TLE7233G Datasheet - Page 23

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TLE7233G

Manufacturer Part Number
TLE7233G
Description
IC DRIVER SPI 4CH LS 24-SSOP
Manufacturer
Infineon Technologies
Type
Low Sider
Datasheet

Specifications of TLE7233G

Input Type
SPI
Number Of Outputs
4
On-state Resistance
1 Ohm
Current - Output / Channel
415mA
Current - Peak Output
950mA
Voltage - Supply
3 V ~ 5.5 V
Operating Temperature
-40°C ~ 150°C
Mounting Type
Surface Mount
Package / Case
24-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
SP000297860

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Figure 11
CS Low to High transition:
Data from shift register is transferred into the input matrix register only, when after the falling edge of CS exactly
a multiple (1, 2, 3, …) of eight SCLK signals have been detected.
SCLK - Serial Clock:
This input pin clocks the internal shift register. The serial input (SI) transfers data into the shift register on the falling
edge of SCLK while the serial output (SO) shifts diagnostic information out on the rising edge of the serial clock.
It is essential that the SCLK pin is in low state whenever chip select CS makes any transition.
SI - Serial Input:
of SCLK. Please refer to
SO - Serial Output:
Data is shifted out serially at this pin, the most significant bit first. SO is in high impedance state until the CS pin
goes to low state. New data will appear at the SO pin following the rising edge of SCLK. Please refer to
for further information.
9.2
The SPI of TLE7233G provides daisy chain capability. In this configuration several devices are activated by the
same CS signal MCS. The SI line of one device is connected with the SO line of another device (see
which builds a chain. The ends of the chain are connected with the output and input of the master device, MO and
MI respectively. The master device provides the master clock MCLK, which is connected to the SCLK line of each
device in the chain.
Datasheet
Serial input data bits are shifted in at this pin, the most significant bit first. SI information is read on the falling edge
Transmission Error Flag on SO Line
Daisy Chain Capability
SI
Section 9.3
SI
SCLK
for further information.
CS
TER
S
SPI
OR
SO
S
23
1
0
SPI Driver for Enhanced Relay Control
SO
Serial Peripheral Interface (SPI)
SPIDER - TLE7233G
Rev. 1.0, 2008-02-28
Section 9.3
Figure
TER.emf
12),

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