TLE7234G Infineon Technologies, TLE7234G Datasheet - Page 26

• Manufacturer Part Number: TLE7234G
• Description: IC DRIVER SPI 8CH HS/LS DSO-20
• Manufacturer: Infineon Technologies
• Type: High Side/Low Side Driverr

Specifications of TLE7234G

• Input Type: SPI
• Number Of Outputs: 8
• On-state Resistance: 850 mOhm
• Current - Peak Output: 1A
• Voltage - Supply: 9 V ~ 28 V
• Operating Temperature: -40°C ~ 150°C
• Mounting Type: Surface Mount
• Package / Case: DSO-20
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output / Channel: -
• Other names: SP000297862

9
The diagnosis and control interface is based on a serial peripheral interface (SPI).
The SPI is a full duplex synchronous serial slave interface, which uses four lines: SO, SI, SCLK and CS. Data is
transferred by the lines SI and SO at the data rate given by SCLK. The falling edge of CS indicates the beginning
of a data access. Data is sampled in on line SI at the falling edge of SCLK and shifted out on line SO at the rising
edge of SCLK. Each access must be terminated by a rising edge of CS. A modulo 8 counter ensures that data is
taken only, when a multiple of 8 bit has been transferred. The interface provides daisy chain capability.
Figure 8
The SPI protocol is described in
9.1
CS - Chip Select: The system micro controller selects the TLE7234G by means of the CS pin. Whenever the pin
is in low state, data transfer can take place. When CS is in high state, any signals at the SCLK and SI pins are
ignored and SO is forced into a high impedance state.
CS High to Low transition:
•
•
Figure 9
Data Sheet
The diagnosis information is transferred into the shift register.
SO changes from high impedance state to high or low state depending on the logic OR combination between
the transmission error flag (TER) and the signal level at pin SI. As a result, even in daisy chain configuration,
a high signal indicates a faulty transmission. For details, please refer to
available to the first rising edge of SCLK.
SCLK
SO
CS
time
SI
Serial Peripheral Interface (SPI)
Serial Peripheral Interface
SPI Signal Description
Transmission Error Flag on SO Line
SI
CS
MSB
MSB
SI
SCLK
CS
TER
S
Section
SPI
6
6
OR
5
5
9.3. It is reset to the default values after reset.
SO
S
4
4
1
0
3
3
26
2
2
SO
1
1
LSB
LSB
Figure
Serial Peripheral Interface (SPI)
9. This information stays
Rev. 1.0, 2008-10-30
TER.emf
SPI.emf
TLE7234G