IRMCK312TR International Rectifier, IRMCK312TR Datasheet - Page 11

• Manufacturer Part Number: IRMCK312TR
• Description: IC MOTOR CTRL OTP BASED 100-QFP
• Manufacturer: International Rectifier

Specifications of IRMCK312TR

• Applications: AC Motor Controller, Permanent Magnet
• Number Of Outputs: 2
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Package: QFP100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output: -
• Voltage - Load: -

www.irf.com
Crystal Interface
Reset Interface
I
4.2
PWM
Fault
4.3
2
C/SPI Interface
XTAL0
XTAL1
RESET
SCL/SO-SI/VPP Output, I
SDA/CS0
P3.0/INT2/CS1
P1.3/SYNC/SCK Input/output port 1.3, can be configured as SYNC output or SPI clock
CPWMUH
CPWMUL
CPWMVH
CPWMVL
CPWMWH
CPWMWL
FPWMUH
FPWMUL
FPWMVH
FPWMVL
FPWMWH
FPWMWL
PFCPWM
CGATEKILL
P5.0/PFCGKILL Input, upon assertion, this negates PFCPWM signal, programmable logic
FGATEKILL
AVDD
AVSS
AREF
CMEXT
Motion Peripheral Interface Group
Analog Interface Group
Input, connected to crystal
Output, connected to crystal
external RC time constant
chip select 1
Output, PFC PWM
programmable logic sense
sense, can be configured as discrete I/O in which case CGATEKILL
negates PFCPWM
programmable logic sense
connected.
Inout, system reset, needs to be pulled up to VDD1 but doesn’t require
Input/output, I
Input/output port 3.0, can be configured as external interrupt 2 or SPI
Output, motor 1 PWM phase U high side gate signal
Output, motor 1 PWM phase U low side gate signal
Output, motor 1 PWM phase V high side gate signal
Output, motor 1 PWM phase V low side gate signal
Output, motor 1 PWM phase W high side gate signal
Output, motor 1 PWM phase W low side gate signal
Output, motor 2 PWM phase U high side gate signal
Output, motor 2 PWM phase U low side gate signal
Output, motor 2 PWM phase V high side gate signal
Output, motor 2 PWM phase V low side gate signal
Output, motor 2 PWM phase W high side gate signal
Output, motor 2 PWM phase W low side gate signal
Input, upon assertion, this negates all six PWM signals for motor 1,
Input, upon assertion, this negates all six PWM signals for motor 2,
Analog power (1.8V)
Analog power return
Buffered 0.6V output
Unbuffered 0.6V, input to the AREF buffer, capacitor needs to be
2
C clock output, SPI SO-SI
2
C Data line, Chip Select 0 of SPI
11
© 2007 International Rectifier
IRMCK312