AMIS30621C6217G ON Semiconductor, AMIS30621C6217G Datasheet - Page 47

• Manufacturer Part Number: AMIS30621C6217G
• Description: IC MOTOR STEPPER DVR/CTLR 20SOIC
• Manufacturer: ON Semiconductor
• Type: Micro Stepping Motor Driverr

Specifications of AMIS30621C6217G

• Number Of Outputs: 4
• Voltage - Supply: 6.5 V ~ 29 V
• Operating Temperature: -40°C ~ 165°C
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC (7.5mm Width)
• Product: Stepper Motor Controllers / Drivers
• Operating Supply Voltage: 6.5 V to 29 V
• Supply Current: 800 mA
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output: -
• Applications: -
• Voltage - Load: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

GetOTPparam
after a preparing frame (see Preparing frames), to read the
GetOTPparam corresponds to a LIN in−frame response with 0x3D indirect ID.
Where:
40. Although not stored in the OTP memory the physical status of the hardware address input pins are returned by a read of the OTP contents.
41. The Ihold0 bit is read as ‘1’ for product version AIMS30621C6217G and AMIS30621C6217RG.
Table 41. GetOTPparam PREPARING FRAME TYPE #7
Table 42. GetOTPparam READING FRAME TYPE #6
This command is provided to the circuit by the LIN master
Byte
(*) According to parity computation
1. The master sends a type #7 preparing frame. After the type#7 preparing frame, the master sends a reading frame
2. The master sends a type #8 preparing frame. After the type#8 preparing frame, the master sends a reading frame
0
1
2
3
4
5
6
7
8
9
Byte
type#6 to retrieve the circuit’s in−frame response.
type#6 to retrieve the circuit’s in−frame response.
0
1
2
3
Checksum
Content
Identifier
Data 1
Data 2
Data 3
Data 4
Data 5
Data 6
Data 7
Data 8
Checksum
Identifier
Content
Data 1
Data 2
SecPos10
SecPos7
Vmax3
OSC3
Irun3
Bit 7
ADM
0
1
Bit 7
1
1
*
(Note 40)
SecPos9
SecPos6
Vmax2
(HW2)
OSC2
TSD2
Bit 6
Irun2
1
Bit 6
*
(Note 40)
SecPos8
SecPos5
Vmax1
(HW1)
OSC1
TSD1
http://onsemi.com
Irun1
Bit 5
1
Bit 5
0
47
(Note 40)
SecPos4
Vmax0
(HW0)
OSC0
TSD0
Irun0
Shaft
Bit 4
Checksum over data
content of an OTP memory segment which address was
specified in the preparation frame.
1
Checksum over data
Bit 4
ID4
Structure
Structure
CMD[6:0] = 0x02
StepMode1
SecPos3
IREF3
Ihold3
Vmin3
Bit 3
Acc3
BG3
PA3
AD[6:0]
1
Bit 3
ID3
StepMode0
SecPos2
IREF2
Vmin2
Ihold2
Acc2
Bit 2
BG2
PA2
Bit 2
ID2
1
SecPos1
LOCKBT
IREF1
Vmin1
Ihold1
Bit 1
Bit 1
Acc1
BG1
PA1
ID1
0
(Note 41)
LOCKBG
SecPos0
IREF0
Vmin0
Ihold0
Acc0
Bit 0
Bit 0
BG0
PA0
ID0
1