NCP1631DR2G ON Semiconductor, NCP1631DR2G Datasheet
NCP1631DR2G
Specifications of NCP1631DR2G
Available stocks
Related parts for NCP1631DR2G
NCP1631DR2G Summary of contents
Page 1
... OSC Vcontrol FFOLD BO OVP / UVP (Top View) ORDERING INFORMATION Device Package NCP1631DR2G SOIC−16 (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. Typical Applications • Computer Power Supplies • ...
Page 2
R R bo1 ovp1 OVP in Ac lin bo2 ovp2 EMI Filter Cin Table 1. MAXIMUM RATINGS TABLE Symbol V Maximum Power Supply Voltage Continuous CC(MAX) V Maximum Input Voltage on Low Power Pins MAX V V ...
Page 3
Table 2. TYPICAL ELECTRICAL CHARACTERISTICS TABLE (Conditions pin7 pin10 Characteristics STARTUP AND SUPPLY CIRCUITS Supply Voltage Startup Threshold Minimum Operating Voltage Hysteresis V – V CC(on) CC(off) Internal Logic Reset ...
Page 4
Table 2. TYPICAL ELECTRICAL CHARACTERISTICS TABLE (Conditions pin7 pin10 Characteristics GATE DRIVE Fall Time DRV1 DRV2 REGULATION BLOCK Feedback Voltage Reference Error Amplifier Source Current Capability Error Amplifier Sink Current ...
Page 5
Table 2. TYPICAL ELECTRICAL CHARACTERISTICS TABLE (Conditions pin7 pin10 Characteristics ZERO VOLTAGE DETECTION CIRCUIT (valid for ZCD1 and ZCD2) Input Clamp Voltage High State Low State Internal Input Capacitance (Note ...
Page 6
Table 3. DETAILED PIN DESCRIPTION Pin Number Name 1 ZCD2 This is the zero current detection pin for phase 2 of the interleaved PFC stage. Apply the voltage from an auxiliary winding to detect the core reset of the inductor ...
Page 7
Vout low detect − 0.955*Vref + Error Amplifier ± − Vref + OVLflag1 Vcontrol pfcOK I FF Generation of the oscillator charge current FFOLD function of V REGUL (frequency fold−back) ...
Page 8
Detailed Operating Description The NCP1631 integrates a dual MOSFET driver for interleaved, 2−phase PFC applications. It drives the two branches in so−called Frequency Clamped Critical conduction Mode (FCCrM) where each phase operates in Critical conduction Mode (CrM) in the most ...
Page 9
Figure 3. DCM and CRM Operation Within a Sinusoid Cycle for One Branch NCP1631 On−time Modulation Let’s study the ac line current absorbed by one phase of the interleaved PFC converter. The current waveform of the inductor (L) during one ...
Page 10
Given the regulation low bandwidth of the PFC systems and then (V ) are slow varying signals. CONTROL REGUL Hence, the line current absorbed by each phase is in(phase1) in(phase2) C where: ...
Page 11
Figure 8. Input Voltage and On−time vs. Time (example with F Regulation Block and Low Output Voltage Detection A trans−conductance error amplifier with access to the inverting input and ...
Page 12
Provided the low bandwidth of the regulation loop, sharp variations of the load, may result in excessive over and under−shoots. Over−shoots are limited by the Over− Voltage Protection (see OVP section). To contain the under−shoots, an internal comparator monitors the ...
Page 13
Figure 12. Zero Current Detection Timing Diagram (V AUX Current Sense The NCP1631 is designed to monitor a negative voltage proportional to total input current, i.e., the current drawn by the two interleaved branches (I in Figure 13, a current ...
Page 14
If the MOSFET turns on during this severe transient, it may be over−stressed and finally damaged. That is why, the NCP1631 permanently monitors the input current and delays ...
Page 15
The double feed−back configuration offers some up−graded safety level as it protects the PFC stage even if there is a failure of one of the two feed−back arrangements. However, if wished, one single feed−back arrangement is possible as portrayed by ...
Page 16
However, the coil current can possibly be non zero when the clock signal turns high. The circuit would enter Continuous Conduction Mode (CCM) if the MOSFET turned on in that moment. In order to avoid CCM operation, the clock ...
Page 17
Figure 17. Typical Waveforms (T Frequency Foldback In addition, the circuit features the frequency fold−back function to improve the light load efficiency. Practically, the oscillator charge and discharge currents ( Figure 16) are not constant but dependent on ...
Page 18
OSC OSC(nom) V REGUL f + OSC Let’s illustrate this operation on an example the control signal that varies between 0 and REGUL 1. 1.66 V) corresponding to the ...
Page 19
Brown−Out Protection The brown−out pin receives a portion of the input voltage (V the ac line ripple so that a voltage proportional to the average value line bo1 Filter ...
Page 20
The 7−mA current source is enabled that lowers the pin7 voltage for hysteresis purpose. A short delay ( added to get sure that these three delay actions are properly done before the PFC driver is disabled and ...
Page 21
Internal Thermal Shutdown TSD Fault management When any of the following faults is detected: − brown−out (“BO_NOK”) − Under−Voltage Protection (“UVP”) − Latch−off condition (“Stdwn”) − Die over−temperature (“TSD”) − Too low current sourced by the R t − “UVLO” ...
Page 22
Figure 21. Start−up and Brown Out Conditions http://onsemi.com 22 ...
Page 23
... SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...