MAX1978ETM+ Maxim Integrated Products, MAX1978ETM+ Datasheet - Page 17

• Manufacturer Part Number: MAX1978ETM+
• Description: IC CNTRLR INT TEMP 48TQFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX1978ETM+

• Applications: Thermoelectric Cooler
• Voltage - Supply: 3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-TQFN Exposed Pad
• Output Voltage Range: - 4.3 V to + 4.3 V
• Output Current: 6 A
• Input Voltage Range: 3 V to 5.5 V
• Input Current: 30 mA
• Power Dissipation: 2105 mW
• Operating Temperature Range: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Ic Output Type: Current
• Sensing Accuracy Range: ± 1%
• Supply Current: 30mA
• Supply Voltage Range: 3V To 5.5V
• Sensor Case Style: QFN
• No. Of Pins: 48
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Temperature Sensing Range: -40°C To +85°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Drive SHDN low to place the MAX1978/MAX1979 in a
power-saving shutdown mode. When the MAX1978/
MAX1979 are in shutdown, the TEC is off (V
V
2mA (typ).
ITEC is a status output that provides a voltage propor-
tional to the actual TEC current. ITEC = REF when TEC
current is zero. The transfer function for the ITEC output:
Use ITEC to monitor the cooling or heating current
through the TEC. The maximum capacitance that ITEC
can drive is 100pF.
The MAX1978/MAX1979 drive a thermoelectric cooler
inside a thermal-control loop. TEC drive polarity and
power are regulated to maintain a stable control tem-
perature based on temperature information read from a
thermistor, or from other temperature-measuring
devices. Carefully selected external components can
achieve 0.001°C temperature stability. The MAX1978/
MAX1979 provide precision amplifiers and an integra-
tor amplifier to implement the thermal-control loop
(Figures 1 and 2).
Typically, the thermal loop consists of an error amplifier
and proportional integral derivative controller (PID)
(Figure 4). The thermal response of the TEC module
must be understood before compensating the thermal
loop. In particular, TECs generally have stronger heat-
ing capacity than cooling capacity because of the
effects of waste heat. Consider this point when analyz-
ing the TEC response.
Analysis of the TEC using a signal analyzer can ease
compensation calculations. Most TECs can be crudely
modeled as a two-pole system. The second pole poten-
tially creates an oscillatory condition because of the
associated 180° phase shift. A dominant pole compen-
sation scheme is not practical because the crossover
frequency (the point of the Bode plot where the gain is
zero dB) must be below the TEC’s first pole, often as
low as 0.02Hz. This requires an excessively large inte-
OS2
decay to GND) and input supply current lowers to
Connecting and Compensating the
V
ITEC
Applications Information
= 1.50 + 8
______________________________________________________________________________________
Thermal-Control Loop

(V
OS1
Shutdown Control
- V
CS
Controllers for Peltier Modules
ITEC Output
)
OS1
and
Integrated Temperature
grator capacitor and results in slow loop-transient
response. A better approach is to use a PID controller,
where two additional zeros are used to cancel the TEC
and integrator poles. Adequate phase margin can be
achieved near the frequency of the TEC’s second pole
when using a PID controller. The following is an exam-
ple of the compensation procedure using a PID con-
troller.
Figure 6 details a two-pole transfer function of a typical
TEC module. This Bode plot can be generated with a
signal analyzer driving the CTLI input of the
MAX1978/MAX1979, while plotting the thermistor volt-
age from the module. For the example module, the two
poles are at 0.02Hz and 1Hz.
The first step in compensating the control loop involves
selecting components R3 and C2 for highest DC gain.
Film capacitors provide the lowest leakage but can be
large. Ceramic capacitors are a good compromise
between low leakage and small size. Tantalum and
electrolytic capacitors have the highest leakage and
generally are not suitable for this application. The inte-
grating capacitor, C2, and R3 (Figure 4) set the first
zero (fz1). The specific application dictates where the
first zero should be set. Choosing a very low frequency
results in a very large value capacitor. Set the first zero
frequency to no more than 8 times the frequency of the
lowest TEC pole. Setting the frequency more than 8
times the lowest pole results in the phase falling below
-135° and may cause instability in the system. For this
example, C2 = 10µF. Resistor R3 then sets the zero at
0.16Hz using the following equation:
This yields a value of R3 = 99.47kΩ. For our example,
use 100kΩ.
Next, adjust the gain for a crossover frequency for max-
imum phase margin near the TEC’s second pole. From
Figure 6, the TEC bode plot, approximately 30dB of
gain is needed to move the 0dB crossover point up to
1.5Hz. The error amplifier provides a fixed gain of 50,
or approximately 34dB. Therefore, the integrator needs
to provide -4dB of gain at 1.5Hz. C1 and R3 set the
gain at the crossover frequency.
C
1
fz
=
1
C
=
1
2
2
+
π
2
×
π
C
A
×
1
2
R
×
3
R
×
3
f
C
17