MAX1978ETM+ Maxim Integrated Products, MAX1978ETM+ Datasheet - Page 18

IC CNTRLR INT TEMP 48TQFN

MAX1978ETM+

Manufacturer Part Number
MAX1978ETM+
Description
IC CNTRLR INT TEMP 48TQFN
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX1978ETM+

Applications
Thermoelectric Cooler
Voltage - Supply
3 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-TQFN Exposed Pad
Output Voltage Range
- 4.3 V to + 4.3 V
Output Current
6 A
Input Voltage Range
3 V to 5.5 V
Input Current
30 mA
Power Dissipation
2105 mW
Operating Temperature Range
- 40 C to + 85 C
Mounting Style
SMD/SMT
Ic Output Type
Current
Sensing Accuracy Range
± 1%
Supply Current
30mA
Supply Voltage Range
3V To 5.5V
Sensor Case Style
QFN
No. Of Pins
48
Filter Terminals
SMD
Rohs Compliant
Yes
Temperature Sensing Range
-40°C To +85°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
where:
A = The gain needed to move the 0dB crossover point
up to the desired frequency. In this case, A = -4dB =
0.6.
f
example.
C1 is found to be 0.58µF; use 0.47µF.
Next, the second TEC pole must be cancelled by
adding a zero. Canceling the second TEC pole pro-
vides maximum phase margin by adding positive
phase to the circuit. Setting a second zero (fz2) to at
least 1/5 the crossover frequency (1.5Hz/5 = 0.3Hz),
and a pole (fp1) to 5 times the crossover frequency or
higher (5 × 1.5Hz = 7.5Hz) ensures good phase margin,
while allowing for variation in the location of the TEC’s
second pole. Set the zero fz2 to 0.3Hz and calculate R2:
where fz2 is the second zero.
R2 is calculated to be 1.1MΩ; use 1MΩ.
Now pole fp1 is added at least 5 times the crossover
frequency to terminate zero fz2.
Integrated Temperature
Controllers for Peltier Modules
Figure 6. Bode Plot of a Generic TEC Module
18
C
= The desired crossover frequency, 1.5Hz in this
______________________________________________________________________________________
-10
-20
-30
-40
-50
-60
-70
-80
40
30
20
10
0
0.001
0.01
fz
TEC GAIN AND PHASE
2
=
FREQUENCY (Hz)
0.1
2
π
×
C
1
1
1
×
R
2
10
100
90
45
0
-45
-90
-135
-180
Choose fp1 = 15Hz, find R1 using the following equation:
Resistor R1 is found to be 22kΩ, use 20kΩ
The final step is to terminate the first zero by setting the
rolloff frequency with a second pole, fp2. A good
choice is 2 times fp1.
Choose fp2 = 30Hz, find C3 using the following equation:
where C3 is found to be 0.05µF, use 0.047µF.
Figure 7 displays the compensated gain and phase
plots for the above example.
The example given is a good place to start when com-
pensating the thermal loop. Different TEC modules
require individual testing to find their optimal compen-
sation scheme. Other compensation schemes can be
used. The above procedure should provide good
results for the majority of optical modules.
Figure 7. Compensated Thermal-Control Loop Using the TEC
Module in Figure 6
-10
-20
-30
-40
-50
-60
-70
-80
80
70
60
50
40
30
20
10
0
0.001
0.01
fp
fp
TEC GAIN AND PHASE
1
2
=
COMPENSATED
=
FREQUENCY (Hz)
2
0.1
2
π
π
×
×
C
1
C
1
1
3
1
×
×
R
R
1
3
10
100
90
45
0
-45
-90
-135
-180

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