SI3460-E03-GM Silicon Laboratories Inc, SI3460-E03-GM Datasheet
SI3460-E03-GM
Specifications of SI3460-E03-GM
Available stocks
Related parts for SI3460-E03-GM
SI3460-E03-GM Summary of contents
Page 1
... IEEE 802.3af-compliant Power Sourcing Equipment (PSE). Designed to minimize system cost and ease implementation in embedded PSE endpoint (switches) or midspan (power injector) applications, the Si3460 operates directly from input supply and integrates a digital PWM-based dc-dc converter for generating the –48 V PSE output supply. The IEEE-required Powered Device (PD) detection feature uses a robust 3-point algorithm to avoid false detection events ...
Page 2
... Si3460 Block Diagram OTP Memory Machine RST STATUS 2 PWM DC/DC Osc. Controller: UVLO, Current Limiting, State Short Circuit Protection Control Config. PSE & LED Controller: I/F Detection Classification Disconnect Rev. 1.1 GATE 250KHZ VSENSE ISENSE CTRL1 CTRL2 DETA ...
Page 3
... ABLE O F ONTENTS Section 1. Si3460-EVB Application Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 1.1. Si3460-EVB Performance Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 2. Si3460 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 3. Si3460-EVB Performance Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 3.1. PSE Timing Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 3.2. DC-DC Converter Performance Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 4. Si3460-EVB Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.1. Reset State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 4.2. Operating Mode Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.3. Operating Mode Sequencing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5 ...
Page 4
... Si3460 1. Si3460-EVB Application Diagram V IN RST +11V to 16V V EE Note: Refer to the Si3460-EVB User Guide for complete schematic details Figure 1. Si3460-EVB Application Diagram 4 VDD ISENSE GATE CTRL1 DETA Si3460 PWM BOM 250KHZ CTRL2 VSENSE STATUS GND DETECT FAULT PGOOD Rev. 1.1 ...
Page 5
... Si3460-EVB Performance Characteristics When implemented according to the recommended external components and layout guidelines for the Si3460- EVB, the Si3460 enables the following performance specifications in single-port PSE applications. Please refer to the Si3460-EVB User’s Guide and schematics for details. Table 1. Selected Electrical Specifications (Si3460-EVB) ...
Page 6
... Si3460 2. Si3460 Electrical Specifications The following specifications apply to the Si3460 controller. Refer to Tables and 7, the Si3460-EVB User’s Guide, and schematics for additional details about the electrical specifications of the Si3460-EVB reference design. Table 2. Recommended Operating Conditions* Symbol Description Operating temperature range ...
Page 7
... µA — — 0.4 x VDD OL Any digital pin 0.7 x VDD Any digital pin — — IN — — Rev. 1.1 Si3460 Typ Max Unit — — — — V — — 0.6 — 0.1 V — V — 0.3 x VDD V ±1 — µA 5 — ...
Page 8
... Si3460 3. Si3460-EVB Performance Characteristics When implemented in accordance with the recommended external components and layout guidelines, the Si3460 controller enables the following typical performance characteristics in single-port PSE applications. Refer to the Si3460-EVB applications note, schematics, and user's guide for more details. Table 5. PSE Performance Characteristics ...
Page 9
... PSE Timing Characteristics When implemented in accordance with the recommended external components and layout guidelines, the Si3460 controller enables the following typical performance characteristics in single-port PSE applications. Refer to the Si3460-EVB applications note, schematics, and user's guide for more details. Table 6. PSE Timing* ...
Page 10
... DC-DC Converter Performance Characteristics The dc-dc converter utilizes a digital control loop architecture operating at 250 kHz. The complete converter is comprised of the Si3460 controller and the external components in the Si3460-EVB schematics. The performance specifications in Table 7 are typical for the Si3460-EVB reference design. ...
Page 11
... Si3460-EVB reference design. Refer to the Si3460-EVB User’s Guide and schematics for descriptions in the following sections. 4.1. Reset State At powerup or if reset is held low, the Si3460 inactive state with the PWM turned off (the switcher FET, M1, is off) and the pass FET, M2, is off. 4.2. Operating Mode Configuration At powerup, the Si3460 reads the voltage on the STATUS pin, which is set by a resistor divider from V ground ...
Page 12
... V and then back to 4.5 V for each level. If the PD's OUT signature resistance is in the RGOOD range 26.5 k, the Si3460 proceeds to classification and powerup. If the PD resistance is not in this range, the detection sequence repeats continuously. Detection is sequenced approximately every 320 msec and repeats until RGOOD is sensed, indicating a valid PD has been detected ...
Page 13
... UVLO The Si3460-EVB reference design is optimized for nominal input voltages (11 V min maximum). If the input voltage drops below detection mode or if the output voltage drops below classification or powerup mode, a UVLO condition is declared, which generates the error condition (LED flashing rapidly). An undervoltage event is a fault condition reported through the status LED as a rapid blinking of 10 flashes per second ...
Page 14
... The input power supply should be rated for at least 25% higher power level than the output power level chosen. This is primarily to account for the 75 to 80% nominal efficiency performance of the Si3460-EVB reference design. For example, to support a Class 0 PSE, for example, the input supply should be capable of supplying 19.25 W (15 ...
Page 15
... Si3460 Pin Descriptions Si3460 pin functionality is described in Table 10. Note that the information applies to the Si3460 device pins, while the Si3460-EVB User’s Guide describes the inputs and outputs of the evaluation system. The electrical characteristics of the Si3460-EVB are summarized in Table 1 on page 5. Refer to the complete Si3460-EVB schematics and BOM listing for information about the external components needed for the complete PSE and dc-dc controller application circuit ...
Page 16
... GND GND 16 Pin Function Active low reset input. When low (to GND), places the Si3460 device into an inactive state. The dc-dc converter is disabled. When pulled high, the device begins the detection process sequence. The dc-dc begins to function after a valid R indicating a valid PD has been detected. ...
Page 17
... Si3460-E03-GM 0.6.8 Si3460-EVB N/A Notes: 1. Add “R” to part number to denote tape-and-reel option (e.g., Si3460-E03-GMR). 2. The ordering part number above is not the same as the device mark. See"8.3. Device Marking of Production Devices" on page 21 for more information. Description Package Information Single-port PSE controller 3 mm ...
Page 18
... Si3460 8. Package Outline: 11-Pin QFN Figure 4 illustrates the package details for the Si3460. Table 11 lists the values for the dimensions shown in the illustration. The Si3460 is packaged in an industry-standard, 3x3 mm, RoHS-compliant, Pb-free, 11-pin QFN package. Table 11. Package Diagram Dimensions Dimension aaa bbb ...
Page 19
... Solder Paste Mask 0.10 mm 0.35 mm 0.50 mm 0. 0.50 mm 0.35 mm 0. 0.60 mm 0. Figure 5. Solder Paste Mask Rev. 1.1 Si3460 0. ...
Page 20
... Si3460 8.2. PCB Landing Pattern 0.10 mm 0.35 mm 0.50 mm 0. Figure 6. Typical QFN-11 Landing Diagram 0. Rev. 1.1 ...
Page 21
... Line 1 is the part number, line 2 is the lot code, and line 3 is the date code. The part number marking is different for Si3460-E02 devices and Si3460-E03. The silicon revision letter is the first letter of the lot code ("E" for both Si3460- E02 and Si3460-E03 devices). Figure 8 shows how to decode the top side marking. ...
Page 22
... Si3460 OCUMENT HANGE IST Revision 0.4 to Revision 1.0 Added Table 1 specification values on page 5. Updated Table 5 specification values for I on page 8. Revised “4.3.2. Classification” text description on page 12. Added I and I current limits to Table 9 on CUT LIM page 12. ...
Page 23
... N : OTES Rev. 1.1 Si3460 23 ...
Page 24
... Si3460 C I ONTACT NFORMATION Silicon Laboratories Inc. 400 West Cesar Chavez Austin, TX 78701 Tel: 1+(512) 416-8500 Fax: 1+(512) 416-9669 Toll Free: 1+(877) 444-3032 Please visit the Silicon Labs Technical Support web page: https://www.silabs.com/support/pages/contacttechnicalsupport.aspx and register to submit a technical support request. The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. ...