ISL6441IRZ-T Intersil, ISL6441IRZ-T Datasheet - Page 11

• Manufacturer Part Number: ISL6441IRZ-T
• Description: IC CTRLR PWM DUAL 1.4MHZ 28-QFN
• Manufacturer: Intersil

Specifications of ISL6441IRZ-T

• Applications: Power Supplies
• Current - Supply: 2mA
• Voltage - Supply: 5.6 V ~ 24 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The internal LDO can source over 60mA to supply the IC,
power the low side gate drivers, charge the external boot
capacitor and supply small external loads. When driving
large FETs especially at 1.4MHz frequency, little or no
regulator current may be available for external loads.
For example, a single large FET with 15nC total gate charge
requires 15nC x 1.4MHz = 21mA. Also, at higher input
voltages with larger FETs, the power dissipation across the
internal 5V will increase. Excessive dissipation across this
regulator must be avoided to prevent junction temperature
rise. Larger FETs can be used with 5V ±10% input
applications. The thermal overload protection circuit will be
triggered if the VCC_5V output is short circuited. Connect
VCC_5V to V
Soft-Start Operation
When soft-start is initiated, the voltage on the SS pin of the
enabled PWM channels starts to ramp gradually, due to the
5µA current sourced into the external capacitor. The output
voltage follows the soft-start voltage.
When the SS pin voltage reaches 0.8V, the output voltage of
the enabled PWM channel reaches the regulation point, and
the soft-start pin voltage continues to rise. At this point the
PGOOD and fault circuitry is enabled. This completes the
soft-start sequence. Any further rise of SS pin voltage does
not affect the output voltage. By varying the values of the
soft-start capacitors, it is possible to provide sequencing of the
main outputs at start-up. The soft-start time can be obtained
from Equation 1:
The soft-start capacitors can be chosen to provide start-up
tracking for the two PWM outputs. This can be achieved by
choosing the soft-start capacitors such that the soft-start
capacitor ration equals the respective PWM output voltage
ratio. For example, if I use PWM1 = 1.2V and PWM2 = 3.3V
then the soft-start capacitor ration should be,
T
SOFT
=
0.8V
FIGURE 13. SOFT-START OPERATION
IN
⎛
⎝
C
-----------
5μA
for 5V ±10% input applications.
SS
SS1 1V/DIV
VCC_5V 1V/DIV
V
⎞
⎠
OUT1
1V/DIV
11
(EQ. 1)
ISL6441
C
waveform with C
Output Voltage Programming
A resistive divider from the output to ground sets the output
voltage of either PWM channel. The center point of the
divider shall be connected to FBx pin. The output voltage
value is determined by Equation 2.
where R
and R
Out-of-Phase Operation
The two PWM controllers in the ISL6441 operate 180
out-of-phase to reduce input ripple current. This reduces the
input capacitor ripple current requirements, reduces power
supply-induced noise, and improves EMI. This effectively
helps to lower component cost, save board space and
reduce EMI.
Dual PWMs typically operate in-phase and turn on both
upper FETs at the same time. The input capacitor must then
support the instantaneous current requirements of both
controllers simultaneously, resulting in increased ripple
voltage and current. The higher RMS ripple current lowers
the efficiency due to the power loss associated with the ESR
of the input capacitor. This typically requires more low-ESR
capacitors in parallel to minimize the input voltage ripple and
ESR-related losses, or to meet the required ripple current
rating.
With dual synchronized out-of-phase operation, the
high-side MOSFETs of the ISL6441 turn on 180
out-of-phase. The instantaneous input current peaks of both
regulators no longer overlap, resulting in reduced RMS
ripple current and input voltage ripple. This reduces the
required input capacitor ripple current rating, allowing fewer
or less expensive capacitors, and reducing the shielding
V
SS1
FIGURE 14. PWM1 AND PWM2 OUTPUT TRACKING DURING
OUTx
/C
2
SS2
is the resistor connected from FBx to ground.
=
1
is the top resistor of the feedback divider network
0.8V
= 1.2/3.3 = 0.364. Figure 14 shows that soft-start
START-UP
⎛
⎜
⎝
R
-------------------- -
SS1
1
R
+
2
R
= 0.01µF and C
2
⎞
⎟
⎠
SS2
= 0.027µF.
V
V
OUT2
OUT1
°
1V/DIV
1V/DIV
May 26, 2009
°
FN9197.3
(EQ. 2)