IR3086AMPBF International Rectifier, IR3086AMPBF Datasheet - Page 29

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IR3086AMPBF

Manufacturer Part Number
IR3086AMPBF
Description
IC PHASE CONTROLLER OVP 20MLPQ
Manufacturer
International Rectifier
Series
XPhase™r
Datasheet

Specifications of IR3086AMPBF

Applications
Processor
Current - Supply
10mA
Voltage - Supply
8.4 V ~ 14 V
Operating Temperature
0°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
20-MLPQ
Ic Function
Phase IC With Fault And OverTemp Detect
Supply Voltage Range
8.4V To 14V, 6V To 25V, 6V To 14V
Operating Temperature Range
-40°C To +150°C
Digital Ic Case Style
MLPQ
No. Of Pins
20
Rohs Compliant
Yes
Package
20-Lead MLPQ
Circuit
X-Phase Phase IC
Iout (a)
2.5A Gate Driver
Pbf
PbF Option Available
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
*IR3086AMPBF
LAYOUT GUIDELINES
The following layout guidelines are recommended to reduce the parasitic inductance and resistance of the PCB
layout, therefore minimizing the noise coupled to the IC.
• Dedicate at least one middle layer for a ground plane, which is then split into signal ground plane (LGND) and
• Connect PGND to LGND pins of each phase IC to the ground tab, which is tied to LGND and PGND planes
• In order to reduce the noise coupled to SCOMP pin of phase IC, use a dedicated wire to connect the capacitor
• Place current sense resistors and capacitors (R
• Place the decoupling capacitors C
• Place the phase IC as close as possible to the MOSFETs to reduce the parasitic resistance and inductance of
• Place the input ceramic capacitors close to the drain of top MOSFET and the source of bottom MOSFET. Use
• There are two switching power loops. One loop includes the input capacitors, top MOSFET, inductor, output
power ground plane (PGND).
respectively through vias.
C
resistor R
connection for the inductor current sense wires, but separate the two wires by ground polygon. The wire from
the inductor terminal to RCS- should not cross over the fast transition nodes, i.e. switching nodes, gate drive
outputs and bootstrap nodes.
respectively.
the gate drive paths.
combination of different packages of ceramic capacitors.
capacitors and the load; another loop consists of bottom MOSFET, inductor, output capacitors and the load.
Route the switching power paths using wide and short traces or polygons; use multiple vias for connections
between layers.
SCOMP
Page 29 of 33
directly to LGND pin. However, connect PWM ramp capacitor C
PHASE2
PLANE
PLANE
PLANE
PLANE
LGND
LGND
PGND
PGND
To LGND
To LGND
To PGND
To PGND
Plane
Plane
Plane
Plane
or R
PHASE3,
To VIN
To VIN
C
C
C
C
VCC
VCC
VCCL
VCCL
To LGND
To LGND
decoupling capacitor C
Plane
Plane
VCC
PWMRMP
PWMRMP
and C
SCOMP
SCOMP
LGND
LGND
EAIN
EAIN
VCC
VCC
To Bottom
To Bottom
MOSFET
MOSFET
VCCL
CS+
as close as possible to VCC and VCCL pins of the phase IC
To Signal Bus
To Signal Bus
MOSFET
MOSFET
VCC
To Top
To Top
, R
CS-
to LGND plane through vias.
Switching
Switching
, C
Node
Node
To
To
CS+
To LGND
To LGND
CSIN-
CSIN-
Plane
Plane
BIASIN
BIASIN
DACIN
DACIN
PHSFLT
PHSFLT
CSIN+
CSIN+
, and C
PWMRMP
CS-
To Inductor
To Inductor
) close to phase IC. Use Kelvin
Ground
Ground
Polygon
Polygon
, phase delay programming
To Gate
To Gate
Voltage
Voltage
Drive
Drive
IR3086APbF
Ground
Ground
Polygon
Polygon
May 13, 2009

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