LM75AD,112 NXP Semiconductors, LM75AD,112 Datasheet - Page 5

• Manufacturer Part Number: LM75AD,112
• Description: IC TEMP SENSOR DIGITAL 8-SOIC
• Manufacturer: NXP Semiconductors

Specifications of LM75AD,112

• Package / Case: 8-SOIC (3.9mm Width)
• Function: Temp Sensor, Watchdog
• Topology: ADC (Sigma Delta), Comparator, Oscillator, Register Bank
• Sensor Type: Internal
• Sensing Temperature: -55°C ~ 125°C
• Output Type: I²C™
• Output Alarm: No
• Output Fan: Yes
• Voltage - Supply: 2.8 V ~ 5.5 V
• Operating Temperature: -55°C ~ 125°C
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: OM6285 - EVAL BOARD I2C-2002-1A568-4002 - DEMO BOARD I2C
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4226-5; 935269775112; LM75AD; LM75AD

NXP Semiconductors
LM75A_4
Product data sheet
7.2 I
7.3 Slave address
In both cases, comparator mode and interrupt mode, the OS output is activated only if a
number of consecutive faults, defined by the device fault queue, has been met. The fault
queue is programmable and stored in the two bits, B3 and B4, of the Configuration
register. Also, the OS output active state is selectable as HIGH or LOW by setting
accordingly the configuration register bit B2.
At power-up, the device is put into normal operation mode, the T
is set to 75 C, the OS active state is selected LOW and the fault queue is equal to 1. The
temp reading data is not available until the first conversion is completed in about 100 ms.
The OS response to the temperature is illustrated in
The LM75A can be connected to a compatible 2-wire serial interface I
device under the control of a controller or master device, using two device terminals, SCL
and SDA. The controller must provide the SCL clock signal and write/read data to/from the
device through the SDA terminal. Notice that if the I
not been installed as required for I
is needed for each of these two terminals. The bus communication protocols are
described in
The LM75A slave address on the I
device address pins A2, A1 and A0. Each of them is typically connected either to GND for
logic 0, or to V
address. The other four MSB bits of the address data are preset to ‘1001’ by hard wiring
inside the LM75A.
2
Fig 4. OS response to temperature
C-bus serial interface
(1) OS is reset by either reading register. It is assumed that the fault queue is met at each T
T
OS active
OS active
OS reset
OS reset
hyst
T
crossing point.
Section
hyst
T
os
CC
for logic 1. These pins represent the three LSB bits of the device 7-bit
Table 4
7.10.
Rev. 04 — 10 July 2007
shows the device’s complete address and indicates that up to
2
(1)
2
C-bus, then an external pull-up resistor, about 10 k ,
C-bus is partially defined by the logic applied to the
Digital temperature sensor and thermal watchdog
OS output in comparator mode
OS output in interrupt mode
reading temperature limits
2
C-bus common pull-up resistors have
Figure
(1)
4.
os
is set to 80 C, the T
2
C-bus as a slave
© NXP B.V. 2007. All rights reserved.
002aad032
LM75A
(1)
os
and
5 of 24
hyst