LM81CIMT-3/NOPB National Semiconductor, LM81CIMT-3/NOPB Datasheet - Page 30

• Manufacturer Part Number: LM81CIMT-3/NOPB
• Description: IC MONITOR SYS HARDWAR 24-TSSOP
• Manufacturer: National Semiconductor

Specifications of LM81CIMT-3/NOPB

• Function: Hardware Monitor
• Topology: ADC (Sigma Delta), Comparator, Fan Speed Control, Register Bank
• Sensor Type: External & Internal
• Sensing Temperature: -40°C ~ 125°C, External Sensor
• Output Type: SMBus™
• Output Alarm: No
• Output Fan: No
• Voltage - Supply: 2.8 V ~ 3.8 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 24-TSSOP
• Supply Voltage Range: 2.8V To 3.8V
• Reset Type: Active-Low
• Supply Current: 1.4mA
• Digital Ic Case Style: TSSOP
• No. Of Pins: 24
• Operating Temperature Range: -40°C To +125°C
• Rohs Compliant: Yes
• Monitored Voltage: 2.5 V , 3.3 V , 5 V , 12 V
• Manual Reset: Not Resettable
• Watchdog: Watchdog
• Battery Backup Switching: No
• Supply Voltage (max): 3.8 V
• Supply Voltage (min): 2.8 V
• Supply Current (typ): 400 uA (Typ)
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Power Fail Detection: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *LM81CIMT-3; *LM81CIMT-3/NOPB; LM81CIMT-3

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2-3
Bit
0-2
4-7
Bit
0
4
5
6
7
1
3
Functional Description
13.14 Extended Mode Register 1 — Address 4Ch
Power on default –
13.15 Extended Mode Register 2 — Address 4Dh
Power on default –
Extended Mode
Enable
LOW Limit Mask
Bit
T_CRIT_A
Interrupt Mode
Select
T_CRIT_A
Enable
T_CRIT_A
Polarity
T_CRIT_A Mask
Enable
T_CRIT_A Status
Bit
Hysteresis Offset
Value
12-bit
Temperature
Resolution Enable
12-bit
Temperature Data
Name
Name
<
<
7:0
7:0
>
>
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read
Read/Write
Read/Write
= 0100 0100 binary
= 0000 0000 binary
Read/Write
Read/Write
Read Only
Read/Write
(Continued)
A one enables the Extended Interrupt Modes, the T_CRIT_A output and all the
functions listed in the Extended Mode Registers. Bit 7 of the Interrupt Status
register will be activated to reflect the interrupt status of the LOW limit comparison
result.
A mask bit for the LOW limit Interrupt. A one disables the interrupt from propagating
to the INT pin.
The state of these bits select the interrupt mode for T_CRIT_A as described below.
<
<
<
A one enables the T_CRIT_A pin.
A one sets the T_CRIT_A pin active HIGH. A zero sets the T_CRIT_A pin active
LOW.
A one prevents the T_CRIT_A interrupt from propagating to the INT output pin.
A one indicates that a T_CRIT_A interrupt has occurred.
T
A one sets the temperature resolution to 12 bits.
12-bit temperature data least significant bits. Bit 7 mirrors bit 7 in the temperature
configuration register (4Bh) and has a weight of 0.5˚C; bits 6-4 have a weight of
0.25, 0.125, and 0.0625˚C, respectively.
3:2
3:2
3:2
HYST
>
>
>
= 00 or
= 01: One-Time Interrupt Mode
= 10: Comparator Mode
value.
<
3:2
30
>
= 11: Repetitive Interrupt Mode
Description
Description