ADT7483AARQZ-RL ON Semiconductor, ADT7483AARQZ-RL Datasheet - Page 19
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ADT7483AARQZ-RL
Manufacturer Part Number
ADT7483AARQZ-RL
Description
IC TEMP SENSOR/ALARM 2CH 16-QSOP
Manufacturer
ON Semiconductor
Datasheet
1.ADT7483AARQZ.pdf
(24 pages)
Specifications of ADT7483AARQZ-RL
Function
Temp Monitoring System (Sensor)
Topology
ADC, Comparator, Multiplexer, Register Bank
Sensor Type
External & Internal
Sensing Temperature
-40°C ~ 125°C, External Sensor
Output Type
SMBus™
Output Alarm
Yes
Output Fan
Yes
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-QSOP
Full Temp Accuracy
+/- 2.5 C
Digital Output - Bus Interface
Serial (2-Wire)
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Notes
•
•
ALERT OUTPUT
This is applicable when Pin 13 is configured as an ALERT
output. The ALERT output goes low whenever an out-of-limit
measurement is detected, or if the remote temperature sensor is
open circuit. It is an open-drain output and requires a pull-up
to V
that the common line will go low if one or more of the ALERT
outputs goes low.
The ALERT output can be used as an interrupt signal to a
processor, or it can be used as an SMBALERT. Slave devices on
the SMBus cannot normally signal to the bus master that they
want to talk, but the SMBALERT function allows them to do so.
One or more ALERT outputs can be connected to a common
SMBALERT line connected to the master. When the
SMBALERT line is pulled low by one of the devices, the
following procedure occurs, as shown in Figure 19.
1.
2.
3.
START
MASTER
RECEIVES
SMBALERT
DD
It is possible to read a data byte from a data register
without first writing to the address pointer register.
However, if the address pointer register is already at the
correct value, it is not possible to write data to a register
without writing to the address pointer register because the
first data byte of a write is always written to the address
pointer register.
Remember that some of the ADT7483A registers have
different addresses for read and write operations. The write
address of a register must be written to the address pointer
if data is to be written to that register, but it may not be
possible to read data from that address. The read address
of a register must be written to the address pointer before
data can be read from that register.
SMBALERT is pulled low.
Master initiates a read operation and sends the alert
response address (ARA = 0001 100). This is a general call
address that must not be used as a specific device address.
The device whose ALERT output is low responds to the
alert response address, and the master reads its device
address. The device address is seven bits, so an LSB of 1 is
. Several ALERT outputs can be wire-OR’ e d together, so
ALERT RESPONSE
MASTER SENDS
ARA AND READ
ADDRESS
COMMAND
Figure 19. Use of SMBALERT
RD
ACK
DEVICE SENDS
ITS ADDRESS
ADDRESS
DEVICE
ACK
NO
Rev. 1 | Page 19 of 24 | www.onsemi.com
STOP
4.
5.
MASKING THE ALERT OUTPUT
The ALERT output can be masked for local, Remote 1,
Remote 2, or all three channels. This is done by setting the
appropriate mask bits in either the Configuration 1 register
(read address = 0x03, write address = 0x09) or in the
consecutive ALERT register (address = 0x22)
To mask ALERTs due to local temperature, set Bit 5 of the
consecutive ALERT register to 1. Default = 0.
To mask ALERTs due to Remote 1 temperature, set Bit 1 of the
Configuration 1 register to 1. Default = 0.
To mask ALERTs due to Remote 2 temperature, set Bit 0 of the
Configuration 1 register to 1. Default = 0.
To mask ALERTs due to any channel, set Bit 7 of the
Configuration 1 register to 1. Default = 0.
LOW POWER STANDBY MODE
The ADT7483A can be put into low power standby mode by
setting Bit 6 (Mon/STBY bit) of the Configuration 1 register
(read address = 0x03, write address = 0x09) to 1. When Bit 6 is
0, the ADT7483A operates normally. When Bit 6 is 1, the ADC
is inhibited, and any conversion in progress is terminated
without writing the result to the corresponding value register.
The SMBus is still enabled. Power consumption in the standby
mode is reduced to less than 5 μA.
When the device is in standby mode, it is still possible to initiate
a one-shot conversion of both channels by writing to the one-
shot register (Address 0x0F), after which the device will return
to standby. It does not matter what is written to the one-shot
register, all data written to it is ignored.
It is also possible to write new values to the limit register while
in standby mode. If the values stored in the temperature value
added. The address of the device is now known and it can
be interrogated in the usual way.
If more than one device’s ALERT output is low, the one
with the lowest device address will have priority, in
accordance with normal SMBus arbitration.
Once the ADT7483A has responded to the alert response
address, it will reset its ALERT output, provided that the
error condition that caused the ALERT no longer exists. If
the SMBALERT line remains low, the master will send the
ARA again, and so on, until all devices whose ALERT outputs
were low have responded.
ADT7483A