ADT7483AARQZ-RL ON Semiconductor, ADT7483AARQZ-RL Datasheet - Page 6
![IC TEMP SENSOR/ALARM 2CH 16-QSOP](/photos/7/49/74958/16-qsop_492_sml.jpg)
ADT7483AARQZ-RL
Manufacturer Part Number
ADT7483AARQZ-RL
Description
IC TEMP SENSOR/ALARM 2CH 16-QSOP
Manufacturer
ON Semiconductor
Datasheet
1.ADT7483AARQZ.pdf
(24 pages)
Specifications of ADT7483AARQZ-RL
Function
Temp Monitoring System (Sensor)
Topology
ADC, Comparator, Multiplexer, Register Bank
Sensor Type
External & Internal
Sensing Temperature
-40°C ~ 125°C, External Sensor
Output Type
SMBus™
Output Alarm
Yes
Output Fan
Yes
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-QSOP
Full Temp Accuracy
+/- 2.5 C
Digital Output - Bus Interface
Serial (2-Wire)
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ADT7483A
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 4. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Mnemonic
ADD1
V
D1+
D1−
THERM
GND
NC
NC
NC
NC
D2−
D2+
ALERT / THERM2
SDATA
SCLK
ADD0
DD
Description
Address 1 Pin. Tri-state input to set the SMBus address.
Positive Supply, 3 V to 3.6 V.
Positive Connection. Connects to the first remote temperature sensor.
Negative Connection. Connects to the first remote temperature sensor.
Open-Drain Output. Turns a fan on/off, or throttles a CPU clock in the event of an overtemperature
condition.
Supply Ground Connection.
No Connect.
No Connect.
No Connect.
No Connect.
Negative Connection. Connects to the second remote temperature sensor.
Positive Connection. Connects to the second remote temperature sensor.
Open-Drain Logic Output. Used as interrupt or SMBus alert. This may also be configured as a second THERM
output. Requires a pull-up resistor.
Logic Input/Output, SMBus Serial Data. Open-drain output. Requires a pull-up resistor.
Logic Input, SMBus Serial Clock. Requires a pull-up resistor.
Address 0 Pin. Tri-state input to set the SMBus address.
THERM
ADD1
GND
V
D1+
D1–
Figure 3.16-Lead QSOP Pin Configuration
NC
NC
DD
Rev. 1 | Page 6 of 24 | www.onsemi.com
1
2
3
4
5
6
7
8
NC = NO CONNECT
(Not to Scale)
ADT7483A
TOP VIEW
16
15
14
13
12
11
10
9
ADD0
SCLK
SDATA
D2+
D2–
NC
NC
ALERT/THERM2