ADM1026JSTZ-REEL ON Semiconductor, ADM1026JSTZ-REEL Datasheet - Page 3
![IC CNTRL SYS REF/EEPROM 48-LQFP](/photos/7/49/74961/adm1026jstz_sml.jpg)
ADM1026JSTZ-REEL
Manufacturer Part Number
ADM1026JSTZ-REEL
Description
IC CNTRL SYS REF/EEPROM 48-LQFP
Manufacturer
ON Semiconductor
Datasheet
1.ADM1026JSTZ-R7.pdf
(55 pages)
Specifications of ADM1026JSTZ-REEL
Function
Hardware Monitor
Topology
ADC, Comparator, Multiplexer, Register Bank
Sensor Type
External & Internal
Sensing Temperature
0°C ~ 100°C, External Sensor
Output Type
SMBus™
Output Alarm
No
Output Fan
Yes
Voltage - Supply
3 V ~ 5.5 V
Operating Temperature
0°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
48-LFQFP
Full Temp Accuracy
+/- 3 C
Digital Output - Bus Interface
Serial (2-Wire)
Maximum Operating Temperature
+ 100 C
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ADM1026JSTZ-REEL
Manufacturer:
AD
Quantity:
6 906
Company:
Part Number:
ADM1026JSTZ-REEL
Manufacturer:
ON Semiconductor
Quantity:
10 000
Part Number:
ADM1026JSTZ-REEL
Manufacturer:
ON/安森美
Quantity:
20 000
Part Number:
ADM1026JSTZ-REEL7
Manufacturer:
ADI/亚德诺
Quantity:
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Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
NOTE:
ABSOLUTE MAXIMUM RATINGS
THERMAL CHARACTERISTICS
PIN ASSIGNMENT
Pin No.
Positive Supply Voltage (V
Voltage on +12 V
Voltage on −12 V
Voltage on Analog Pins
Voltage on Open−Drain Digital Pins
Input Current at Any Pin
Package Input Current
Maximum Junction Temperature (T
Storage Temperature Range
Lead Temperature, Soldering
ESD Rating
48−lead LQFP
10
12
13
14
15
16
11
1
2
3
4
5
6
7
8
9
This device is ESD sensitive. Use standard ESD precautions when handling.
Vapor Phase (60 sec)
Infrared (15 sec)
−12 V
All Other Pins
ADD/NTESTOUT
FAN0/GPIO0
FAN1/GPIO1
FAN2/GPIO2
FAN3/GPIO3
FAN4/GPIO4
FAN5/GPIO5
FAN6/GPIO6
FAN7/GPIO7
3.3 V MAIN
Mnemonic
GPIO9
GPIO8
IN
DGND
IN
SDA
IN
SCL
CI
Pin
Pin
Pin
CC
)
Package Type
Parameter
Analog Input
Digital Input
Digital Input
Digital Input
JMAX
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Ground
Type
)
†
†
General−purpose I/O pin that can be configured as digital inputs or outputs.
General−purpose I/O pin that can be configured as digital inputs or outputs.
Fan tachometer input with internal 10 kW pullup resistor to 3.3 V STBY. Can be
reconfigured as a general−purpose, open drain, digital I/O pin.
Fan tachometer input with internal 10 kW pullup resistor to 3.3 V STBY. Can be
reconfigured as a general−purpose, open drain, digital I/O pin.
Fan tachometer input with internal 10 kW pullup resistor to 3.3 V STBY. Can be
reconfigured as a general−purpose, open drain, digital I/O pin.
Fan tachometer input with internal 10 kW pullup resistor to 3.3 V STBY. Can be
reconfigured as a general−purpose, open drain, digital I/O pin.
Monitors the main 3.3 V system supply. Does not power the device.
Ground pin for digital circuits.
Fan tachometer input with internal 10 kW pullup resistor to 3.3 V STBY. Can be
reconfigured as a general−purpose, open drain, digital I/O pin.
Fan tachometer input with internal 10 kW pullup resistor to 3.3 V STBY. Can be
reconfigured as a general−purpose, open drain, digital I/O pin.
Fan tachometer input with internal 10 kW pullup resistor to 3.3 V STBY. Can be
reconfigured as a general−purpose, open drain, digital I/O pin.
Fan tachometer input with internal 10 kW pullup resistor to 3.3 V STBY. Can be
reconfigured as a general−purpose, open drain, digital I/O pin.
Open Drain Serial Bus Clock. Requires a 2.2 kW pullup resistor.
Serial Bus Data. Open drain I/O. Requires a 2.2 kW pullup resistor.
This is a three−state input that controls the two LSBs of the serial bus address. It
also functions as the output for NAND tree testing.
An active high input that captures a chassis intrusion event in Bit 6 of Status
Register 4. This bit remains set until cleared, as long as battery voltage is applied
to the V
http://onsemi.com
BAT
input, even when the ADM1026 is powered off.
3
q
50
−0.3 to (V
JA
−0.3 to +6.5
−65 to +150
Description
Rating
1000
2000
+20
−20
±20
150
215
200
6.5
±5
CC
+0.3)
q
10
JC
°C/W
Unit
Unit
mA
mA
°C
°C
°C
V
V
V
V
V
V