FM75M8X Fairchild Semiconductor, FM75M8X Datasheet - Page 12

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FM75M8X

Manufacturer Part Number
FM75M8X
Description
TEMPERATURE SENSOR LV 8SOIC
Manufacturer
Fairchild Semiconductor
Datasheet

Specifications of FM75M8X

Function
Temp Monitoring System (Sensor)
Topology
ADC (Sigma Delta), Comparator, Register Bank
Sensor Type
Internal
Sensing Temperature
-40°C ~ 125°C
Output Type
SMBus™
Output Alarm
Yes
Output Fan
No
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Full Temp Accuracy
4 C
Digital Output - Bus Interface
I2C, SMBus
Digital Output - Number Of Bits
9 bit to 12 bit
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.7 V
Description/function
Semiconductor
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Supply Current
500 uA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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© 2006 Fairchild Semiconductor Corporation
FM75 Rev. 1.0.8
Reading
If the pointer is already pointing to the desired register,
the master can read from that register by setting the
read/write bit (following the slave address) to a one. After
sending an ACK, the FM75 begins transmitting data dur-
ing the following clock cycle. If the configuration register
is being read, the FM75 transmits one byte of data (see
Figure 13). The master should respond with a NACK, fol-
lowed by a stop condition. If the temperature, T
T
bytes of data (see Figure 12). The master must respond
to the first byte of data with an ACK and to the second
byte of data with a NACK followed by a stop condition.
To read from a register other than the one currently indi-
cated by the command register, a pointer to the desired
register must be set. Immediately following the pointer
set, the master must perform a repeat start condition
(see Figure 11 and Figure 15), which indicates to the
FM75 that a new operation is about to occur. If the
repeat start condition does not occur, the FM75 assumes
that a write is taking place and the selected register is
overwritten by the upcoming data on the data bus. After
the start condition, the master must again send the
device address and read/write bit. This time, the read/
write bit must be set to one to indicate a read. The rest of
the read cycle is the same as described in the previous
paragraph for reading from a preset pointer location.
SDA
SCL
HYST
Master
Start
from
register is being read, the FM75 transmits two
Figure 10. Inadvertent 8-Bit Read from 16-Bit Register Where D7 = 0 and Forces Output LOW
1
0
Address Byte
0
1
A2 A1 A0 R/W
FM75
from
Ack
A
D7 D6 D5 D4 D3 D2 D1 D0
Most Significant
(from FM75)
Data Byte
OS,
or
12
Master, but FM75
Writing
All writes must be proceeded by a pointer set, even if the
pointer is already pointing to the desired register.
Immediately following the pointer set, the master must
begin transmitting the data to be written. If the master is
writing to the configuration register, one byte of data
must be sent (see Figure 16). If the T
ter is being written, the master must send two bytes of
data (see Figure 14). After transmitting each byte of
data, the master must release the Serial Data (SDA) line
for one clock cycle to allow the FM75 to acknowledge
receiving the byte. The write operation should be termi-
nated by a stop signal from the master.
Caution: Inadvertent 8-Bit Read from a
16-Bit Register
An inadvertent 8-bit read from a 16-bit register, with the
D7 bit LOW, can cause the FM75 to pause in a state
where the SDA line is pulled LOW by the output data and
is incapable of receiving either a stop or a start condition
from the master. The only way to remove the FM75 from
this state is to continue clocking for nine cycles until SDA
goes HIGH, at which time issuing a stop condition resets
the FM75, shown in Figure 10.
Stop intended by
SDA line locked
No Ack
Master
from
N
low
D7
Nine additional clock cycles to reset the FM75
D6 D5 D4 D3 D2 D1 D0 N
Master must
condition on
detect error
FM75
OS
or T
No Ack
Master
from
www.fairchildsemi.com
HYST
Condition
Master
Stop
from
regis-

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