FM75M8X Fairchild Semiconductor, FM75M8X Datasheet - Page 6

• Manufacturer Part Number: FM75M8X
• Description: TEMPERATURE SENSOR LV 8SOIC
• Manufacturer: Fairchild Semiconductor

Specifications of FM75M8X

• Function: Temp Monitoring System (Sensor)
• Topology: ADC (Sigma Delta), Comparator, Register Bank
• Sensor Type: Internal
• Sensing Temperature: -40°C ~ 125°C
• Output Type: SMBus™
• Output Alarm: Yes
• Output Fan: No
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Full Temp Accuracy: 4 C
• Digital Output - Bus Interface: I2C, SMBus
• Digital Output - Number Of Bits: 9 bit to 12 bit
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Description/function: Semiconductor
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Supply Current: 500 uA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

© 2006 Fairchild Semiconductor Corporation
FM75 Rev. 1.0.8
Basic Operation
The FM75 temperature sensing circuitry continuously
produces analog voltage proportional to the device tem-
perature. At regular intervals, the FM75 converts the
analog voltage to a two’s complement digital value,
which is placed into the temperature register.
The FM75 has an SMBus-compatible digital serial inter-
face that allows access to the data in the temperature
register at any time. In addition, the serial interface pro-
vides access to all other FM75 registers to customize
operation of the device.
The FM75 temperature-to-digital conversion can have 9,
10, 11, or 12-bit resolution selected, providing 0.5°C,
0.25°C, 0.125°C, and 0.0625°C temperature resolution,
respectively. At power-up, the default conversion resolu-
tion is 9-bits. The conversion resolution is controlled by
the R0 and R1 bits in the configuration register.
Table 1 gives examples of the relationship between the
output digital data and the external temperature. The
9-bit, 10-bit, 11-bit, and 12-bit columns in Table 1 indicate
the right-most bit in the output data stream that can con-
tain temperature information for each conversion accu-
racy. Since the output digital data is in two’s-complement
format, the most significant bit of the temperature is the
“sign” bit. If the sign bit is zero, the temperature is posi-
tive; if the sign bit is one, the temperature is negative.
The FM75 has a shutdown mode that reduces the oper-
ating current to 150nA. This mode is controlled by the
SD bit in the configuration register.
Power-Up Default Conditions
The FM75 powers up in the following default state:
• Thermostat mode: comparator mode
• OS polarity: active LOW
• Fault tolerance: 1 fault (i.e., F0 = 0 and F1 = 0 in the
• T
• T
• Register pointer: 00 (temperature register)
• Conversion resolution: 9 bits (i.e., R0 = 0 and R1 = 0
After power-up, these conditions can be reprogrammed
via the serial interface. Refer to the Serial Data Bus
Operation section for FM75 programming instructions.
Thermal Alarm Function
The FM75 thermal alarm function provides programma-
ble thermostat capability and allows the FM75 to function
as a stand-alone thermostat without using the serial
interface. The Over-Limit Signal (OS) output is the alarm
output. This signal is an open-drain output and, at
power-up, this pin is configured with active-low polarity.
configuration register)
in the configuration register)
OS
HYST
: 80°C
: 75°C
6
Table 1. Relationship Between Temperature
and Digital Output
The OS polarity is controlled by the POL bit in the config-
uration register. The programmable upper trip-point tem-
perature for the thermal alarm is stored in the T
register. The programmable hysteresis temperature (i.e.,
the lower trip point) is stored in the T
The thermal alarm has two modes of operation: compar-
ator mode and interrupt mode. At power-up, the default
is comparator mode. The alarm mode is controlled by the
CMP/INTR bit in the configuration register.
Fault Tolerance
For both comparator and Interrupt modes, the alarm
“fault tolerance” setting plays a role in determining when
the OS output is activated. Fault tolerance refers to the
number of consecutive times an error condition must be
detected before the user is notified. Higher fault toler-
ance settings can help eliminate false alarms caused by
noise in the system. The alarm fault tolerance is con-
trolled by bits F0 and F1 in the configuration register.
These bits can be used to set the fault tolerance to 1, 2,
4, or 6, as shown in Table 4. At power-up, these bits both
default to 0 (fault tolerance = 1).
Temperature
+
+
+
+
0
2 -
3 -
4 -
5 -
T
1
1
5
1
e
0
3
5
5
C
2
0
0
2
m
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2 .
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5
0
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2 .
p
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5
6
2
5
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2
6
5
a r
5
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2
C
5
u t
C
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C
s
S
0
0
0
0
0
1
1
1
1
g i
9
B -
10
1
0
0
1
1
c
1
0
1
1
N
e r
t i
b
o
1
0
0
1
0
1
1
1 0
1 0
u
B -
11
s t i
0
0
0
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R
1
1
s
m
v
l o
t i
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b
B -
1
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b
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y
t u
2
R
s r
r e
0
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1
0
1
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s
1
1
1
l o
t i
B -
o i
e
1
0
1
0
1
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1
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0
o i
t u
R
s
0
1
0
0
1
1
f o
d
1 0
1 1
1 0
n
t i
Digital Output
n
l o
0
0
0
0
0
0
e
o i
R
s
t u
n
l o
e
o i
b
s
t u
0
0
0
0
0
0
9
1
1
1
t i
l o
n
o i
t u
n
o i
b
1
HYST
0
0
0
0
0
0
0
1
1
1
t i
0
n
b
1
0
0
0
0
0
0
0
0
0
1
1
t i
register.
1
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b
1
0
0
0
0
0
0
0
0
0
0
1
1
t i
2
A
0
0
0
0
0
0
0
0
0
0
0
0
0
z
w l
0
0
0
0
0
0
0
0
0
0
0
0
0
e
a
0
0
0
0
0
0
0
0
0
0
0
0
0
o r
s y
0
0
0
0
0
0
0
0
0
0
0
0
0
OS