ADT7460ARQ-REEL ON Semiconductor, ADT7460ARQ-REEL Datasheet - Page 21

• Manufacturer Part Number: ADT7460ARQ-REEL
• Description: IC SENSOR TEMP FAN-CTRL 16QSOP
• Manufacturer: ON Semiconductor
• Series: dBCool®r

Specifications of ADT7460ARQ-REEL

• Rohs Status: RoHS non-compliant
• Function: Fan Control, Temp Monitor
• Topology: ADC, Comparator, Multiplexer, Register Bank
• Sensor Type: External & Internal
• Sensing Temperature: -40°C ~ 120°C, External Sensor
• Output Type: SMBus™
• Output Alarm: No
• Output Fan: Yes
• Voltage - Supply: 3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 120°C
• Mounting Type: Surface Mount
• Package / Case: 16-QSOP

Analog Monitoring Cycle Time
The analog monitoring cycle begins when a 1 is written to the
start bit (Bit 0) of Configuration Register 1 (Reg. 0x40). The
ADC measures each analog input in turn and, as each
ment is completed, the result is automatically stored in the
appropriate value register. This round-robin monitoring cycle
continues unless disabled by writing a 0 to Bit 0 of Configuratio
Register 1.
As the ADC is normally allowed to free-run in this manner, the
time taken to monitor all the analog inputs is normally not of
interest, since the most recently measured value of any input
can be read out at any time. For applications where the
monitoring cycle time is important, it can easily be calculated.
Figure 32. Temperature > High Limit: INT Occurs
Figure 31. Temperature = High Limit: No INT
NO INT
INT
HIGH LIMIT
TEMP > HIGH LIMIT
HIGH LIMIT
TEMP = HIGH LIMIT
measure-
Rev. C | Page 21 of 52
n
The total number of channels measured is
•
•
•
As mentioned previously, the ADC performs round-robin
conversions and take
12 ms for a local temperature reading, an
rem
Th
tem
Th
are m
Fan TACH measureme
synchronized with the a
ST
The r
and 2. Th
of t
If a measurement is with
re
the corresponding status register bit is set to 1.
The state of the vario
by reading the status registers o
(OOL) of Status Register 1 (Reg. 0x41), 1
limi
tha
Alternatively, Pin 5 or P
SM
supervisor of an out-of-
reg
condition that caused th
bits are “sticky. ” Whene
of-limit condition, it re
has
is to read the status regi
rup
interrupt sources to be
Ho
limit, its associated statu
gister bit is cleared to 0. If the measurement is out-of-limits,
e tot
e round robin starts
t yo
weve
ATU
ister
he la
BAL
t sta
per
gon
ote
t ev
Two supply voltage inputs (2.5 V and V
Local temperature
Two remote temperatures
(2 × 11.38) + 12 (2
esults of limit com
eas
u need onl
ature
al moni
s clea
temperature
ent has been
e away
tus ma
ERT output. Th
st me
r, if on
ured a
S RE
e sta
monitorin
rs the appr
asuremen
tus register b
GISTER
sk registe
e of these
(until re
toring cy
pproxim
MONITORED THROUGH STATUS REG 2
y read
OOL = 1 DENOTES A PARAMETER
rea
fla
s 11.38 ms for each volt
Figure 33. Status Register 1
us measurement chann
nts are made in parallel and are not
mains set even if the event that caus
ad). The only way to clear the status b
g is, therefore, nominally
t and limit comparison on that channe
gged in Status
again 35 ms later. Therefore, all channel
S
ver a status bit is set, indicating an ou
masked from causing an SM
opriate status bit as long as the error
ding.
ately every 120 ms.
is automatically notifies the system
ster after the event has gone away. I
rs (Reg. 0x74, 0x75) allow individual
parisons a
in 14 can be configur
limit condition. R
s bit is set in the interrupt
cle time for averaged voltage and
× 25.5) = 85.76 ms
nalog meas
Status Register 2 when this bit is
e interrupt has cleared. Status register
masked interrupt sources goes out-
in limits, the correspondin
IS OUT-OF-LIMIT
it for each channel reflects the stat
ver th
re stored in Stat
urements in any way.
e serial bus. In Bit 7
Register 2. This means
d 25.5 ms for each
means that an out-of-
eading the status
CC
age measurement,
els may be polled
ed as an
)
status registers.
us Registers 1
ADT7460
g status
BALERT
set.
ed it
nter-
of-
t-
.
it
us
l.
s