ADT7460ARQ-REEL ON Semiconductor, ADT7460ARQ-REEL Datasheet - Page 46

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ADT7460ARQ-REEL

Manufacturer Part Number
ADT7460ARQ-REEL
Description
IC SENSOR TEMP FAN-CTRL 16QSOP
Manufacturer
ON Semiconductor
Series
dBCool®r
Datasheet

Specifications of ADT7460ARQ-REEL

Rohs Status
RoHS non-compliant
Function
Fan Control, Temp Monitor
Topology
ADC, Comparator, Multiplexer, Register Bank
Sensor Type
External & Internal
Sensing Temperature
-40°C ~ 120°C, External Sensor
Output Type
SMBus™
Output Alarm
No
Output Fan
Yes
Voltage - Supply
3 V ~ 5.5 V
Operating Temperature
-40°C ~ 120°C
Mounting Type
Surface Mount
Package / Case
16-QSOP

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ADT7460
Table 67. Remote 1 Temperature Offset Register (Power-On Default = 0x00)
Reg ter Add ss
0x70
<7:0>
This register becomes read-only
effe .
Table 68. Local Temperature O
Re
0x71
<7:0>
This register becomes read-only
effect.
T
Register Address
0x72
<7:0>
This register becomes read-only w
effect.
able
gis
ct
is
ter Ad
69.
Remo 2 Temperature Offset Register (Power-On D
dre
re
ss
te
R/W
Read/Writ
Read/Write
R/W
Read/W e
Read/Writ
R/W
Read/Write
Read/
Wri
rit
e
e
te
ffset Register (Power-On Default = 0x00)
when the Configuration Register 1 lock bit is set to 1. Further attempts to write to this register ha
when the Configuration Register 1 lock bit is set to 1. Further attempts to write to this register have no
hen the Configuratio
Description
Local Temperature Offset
Allows a twos complement offset value to be automatically added to or subtracted from the loc
temperature reading. LSB value = 0.25°C.
Descr
Remote 1 Temperature Offset
Allows a twos complement offset value to be automatically added to or subtracted from th
Remote 1 temperature reading. This is to compensate for any inherent sy
trace resistance. LSB value = 0.25°C.
Description
Remote 2 Temperature
Allows a twos complem
Remote 2 temperature reading. This is to compensate for any inherent system offsets such as PCB
trace resistance. LSB value = 0.25°C.
iption
n Register 1 lock bit is set to 1. Further attempts to write to this register have no
Rev. C | Page 46 of 52
Offset
ent offset value to
efault = 0
x00)
be automatically added to or subtracted from the
stem offsets such as PCB
ve no
e
al

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