ADT7462ACPZ-REEL7 ON Semiconductor, ADT7462ACPZ-REEL7 Datasheet - Page 23

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ADT7462ACPZ-REEL7

Manufacturer Part Number
ADT7462ACPZ-REEL7
Description
IC TEMP/VOLT MONITOR 32-LFCSP
Manufacturer
ON Semiconductor
Datasheet

Specifications of ADT7462ACPZ-REEL7

Function
Fan Control, Temp Monitor
Topology
ADC, Comparator, Multiplexer, Register Bank
Sensor Type
External & Internal
Sensing Temperature
-40°C ~ 125°C, External Sensor
Output Type
SMBus™
Output Alarm
No
Output Fan
Yes
Voltage - Supply
3 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
32-LFCSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage Measurement and Limit Registers
measurements are listed in Table 13. Each voltage
measurement channel has a high and low voltage limit
associated with it. The voltage measurements are compared
with these limits. The results of these comparisons are stored
in status registers. A Logic 0 indicates an in−limit condition,
Battery Measurement Input (V
battery to be monitored. This is typically a lithium coin cell,
such as a CR2032. The V
voltages greater than 1.2 V. Note that when Pin 26 is
configured as a +1.2V input, voltages lower than 1.2 V are
not accurately measured. Input voltage and corresponding
voltage measured are shown in Figure 16.
devices powered on when the system is in a powered−off
state. The V
battery drain. To reduce current drain from the battery, the
lower resistor of the V
except when a V
current drain on the V
maximum V
battery functions in a system in excess of the expected 10
years. Note that when a V
made, the current drain is reduced to 16 nA typical. Under
normal voltage measurement operating conditions, all
measurements are made in a round−robin format, and each
reading is actually the result of 16 digitally averaged
measurements. However, averaging is not carried out on the
V
therefore, reduce the current drain from the battery.
Table 13. Voltage Value and Limit Registers
BATT
The corresponding register locations for voltage
The V
Typically, the battery in a system is required to keep some
+1.2V2 (FSB_V
V
V
CCP1
CCP2
+1.2V1 (G
measurement to reduce measurement time and,
BATT
+1.25V or +0.9V
+1.8V or +2.5V
, +1.5V, +1.8V, +2.5V
, +1.5V, +1.8V, +2.5V
+1.5V2 (3GIO)
Voltage Value
+1.5V1 (ICH)
BATT
BATT
+12V1
+12V2
+12V3
+3.3V
input allows the condition of a CMOS backup
+5V
BIT
BATT
measurement input is designed to minimize
) or +3.3V
TT
voltage = 4.0 V), so a CR2032 CMOS
) or V
measurement is being made. The total
BATT
BATT
BATT
BATT
BATT
attenuator is not connected,
pin is 80 nA typical (for a
BATT
input is accurate only for
measurement is not being
Pin No.
)
13
15
19
21
22
23
24
25
26
28
29
7
8
Value Register Address
http://onsemi.com
0xA3
0xA5
0x8B
0x8F
0xA7
0xA9
0x96
0x90
0x91
0x92
0x93
0x94
0x95
23
and a Logic 1 indicates an out−of−limit condition. The
ADT7462 can generate an ALERT, if configured to do so,
when a status bit is set. For more information on the status
registers and ALERT, see the Status and Mask Registers
ALERT section. A complete list of all the high and low
voltage limits in the ADT7462 and their default values is
contained in Table 13.
made is calculated by:
t
t
configuration. Calculating the monitoring cycle time is
described in more detail in the ADC Information section.
V
measurement circuitry is specifically designed with battery
protection in mind. Internal circuitry prevents the battery
from being back−biased by the ADT7462 supply or through
any other path under normal operating conditions. In the
unlikely event of a catastrophic ADT7462 failure, the
ADT7462 includes a second level of battery protection,
including a series 3 kW resistor to limit current to the battery,
as recommended by UL (see Figure 37). Thus, it is not
necessary to add a series resistor between the battery and the
V
V
PULSE
PERIOD
BATT
BATT
BATT
The V
Monitoring cycle time depends on the ADT7462
In addition to minimizing battery current drain, the V
where:
Input Battery Protection
is the V
input to improve voltage measurement accuracy.
input; the battery can be connected directly to the
is the time required to measure all analog inputs.
BATT
Register
0x6D
0x6E
0x6F
0x70
0x45
0x47
0x71
0x72
0x73
0x74
0x75
0x76
0x77
current drain when a measurement is being
BATT
Low Limit
measurement time (~711 ms typical).
I +
Default
0x00
0x00
0x00
0x40
0x40
0x00
0x00
0x20
0x00
0x00
0x80
0x00
0x00
100 kW
V
BATT
Register
t
t
period
0x7C
0x7D
0x4B
0x7E
0x6A
0x6B
0x6C
0x4C
0x68
0x49
0x7F
0x69
0x50
pulse
High Limit
Default
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
0xA4
0xA4
0x95
0x95
BATT

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