ADT7483AARQZ-REEL7 ON Semiconductor, ADT7483AARQZ-REEL7 Datasheet - Page 14

• Manufacturer Part Number: ADT7483AARQZ-REEL7
• Description: IC TEMP SENSOR/ALARM 3CH 16-QSOP
• Manufacturer: ON Semiconductor

Specifications of ADT7483AARQZ-REEL7

• Function: Temp Monitoring System (Sensor)
• Topology: ADC, Comparator, Multiplexer, Register Bank
• Sensor Type: External & Internal
• Sensing Temperature: -40°C ~ 125°C, External Sensor
• Output Type: SMBus™
• Output Alarm: Yes
• Output Fan: Yes
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-QSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADT7483A
Status Registers
The status registers are read-only registers, at Address 0x02
(Status Register 1) and Address 0x23 (Status Register 2). They
contain status information for the ADT7483A.
Table 11. Status Register 1 Bit Assignments
Bit
7
6
5
4
3
2
1
0
1
Table 12. Status Register 2 Bit Assignments
Bit
7
6
5
4
3
2
1
0
1
The eight flags that can generate an ALERT are NOR’ d together,
so if any of them are high, the ALERT interrupt latch is set and
the ALERT output goes low (provided they are not masked out).
Reading the Status 1 register will clear the five flags, Bit 6 to
Bit 2 in Status Register 1, provided the error conditions that
caused the flags to be set have gone away. Reading the Status 2
register will clear the three flags, Bit 4 to Bit 2 in Status Register 2,
provided the error conditions that caused the flags to be set
have gone away. A flag bit can only be reset if the corresponding
value register contains an in-limit measurement or if the sensor
is good.
These flags stay high until the status register is read, or they are reset by POR.
These flags stay high until the status register is read, or they are reset by POR.
BUSY
D1 OPEN
LTHRM1
D2 OPEN
ALERT
Mnemonic
LHIGH
LLOW
R1HIGH
R1LOW
R1THRM1
Mnemonic
Res
Res
Res
R2HIGH
R2LOW
R2THRM1
1
1
1
1
1
1
1
1
Function
Bit set to 1 when ADC converting
Bit set to 1 when local high
temperature limit tripped
Bit set to 1 when local low
temperature limit tripped
Bit set to 1 when remote 1 high
temperature limit tripped
Bit set to 1 when remote 1 low
temperature limit tripped
Bit set to 1 when remote 1 sensor
open circuit
Bit set to 1 when remote1 THERM
limit tripped
Bit set to 1 when local THERM limit
tripped
Function
Reserved for future use
Reserved for future use
Reserved for future use
Bit set to 1 when Remote 2 high
temperature limit tripped
Bit set to 1 when Remote 2 low
temperature limit tripped
Bit set to 1 when Remote 2 sensor
open circuit
Bit set to 1 when Remote2 THERM
limit tripped
Bit set to 1 when ALERT condition
exists
Rev. 1 | Page 14 of 24 | www.onsemi.com
ALERT
No
Yes
Yes
Yes
Yes
Yes
No
No
ALERT
No
No
No
Yes
Yes
Yes
No
No
The ALERT interrupt latch is not reset by reading the status
register. It is reset when the ALERT output has been serviced by
the master reading the device address, provided the error
condition has gone away and the status register flag bits have
been reset.
When Flag 1 and/or Flag 0 of Status Register 1, or Flag 1 of
Status Register 2 are set, the THERM output goes low to
indicate that the temperature measurements are outside the
programmed limits. The THERM output does not need to be
reset, unlike the ALERT output. Once the measurements are
within the limits, the corresponding status register bits are
automatically reset and the THERM output goes high. The user
may add hysteresis by programming Register 0x21. The
THERM output will be reset only when the temperature falls
below the THERM limit minus hysteresis.
When Pin 13 is configured as THERM2, only the high
temperature limits are relevant. If Flag 6, Flag 4 of Status
Register 1, or Flag 4 of Status Register 2 are set, the THERM2
output goes low to indicate that the temperature measurements
are outside the programmed limits. Flag 5 and Flag 3 of Status
Register 1, and Flag 3 of Status Register 2 have no effect on
THERM2. The behavior of THERM2 is otherwise the same as
THERM.
Bit 0 of Status Register 2 is set whenever the ALERT output of
the ADT7483A is asserted low. This means that the user need
only read Status Register 2 to determine if the ADT7483A is
responsible for the ALERT. Bit 0 of Status Register 2 is reset
when the ALERT output is reset. If the ALERT output is
masked, then this bit is not set.
Offset Register
Offset errors may be introduced into the remote temperature
measurement by clock noise or by the thermal diode being
located away from the hot spot. To achieve the specified
accuracy on this channel, these offsets must be removed.
The offset values are stored as 10-bit, twos complement values.
The Remote 1 offset MSBs are stored in Register 0x11, and the
LSBs are stored 0x12 (low byte, left justified). The Remote 2
offset MSBs are stored in Register 0x34, and the LSBs are stored
0x35 (low byte, left justified). The Remote 2 offset can be
written to, or read from, the Remote 1 offset registers if Bit 3 of
the Configuration 1 register is set to 1. This bit should be set to
0 (default) to read the Remote 1 offset values.
Only the upper 2 bits of the LSB registers are used. The MSB of
the MSB offset registers is the sign bit. The minimum offset that
can be programmed is −128°C, and the maximum is +127.75°C.