ISL6553CBZA Intersil, ISL6553CBZA Datasheet - Page 11

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ISL6553CBZA

Manufacturer Part Number
ISL6553CBZA
Description
IC PWM CORE VOLTAGE REG 16-SOIC
Manufacturer
Intersil
Datasheet

Specifications of ISL6553CBZA

Pwm Type
Controller
Number Of Outputs
1
Frequency - Max
1.5MHz
Voltage - Supply
4.75 V ~ 5.25 V
Buck
Yes
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
No
Operating Temperature
0°C ~ 70°C
Package / Case
16-SOIC (3.9mm Width)
Frequency-max
1.5MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Duty Cycle
-
With a high dv/dt load transient, typical of high performance
microprocessors, the largest deviations in output voltage
occur at the leading and trailing edges of the load transient. In
order to fully utilize the output-voltage tolerance range, the
output voltage is positioned in the upper half of the range
when the output is unloaded and in the lower half of the range
when the controller is under full load. This droop
compensation allows larger transient voltage deviations and
thus reduces the size and cost of the output filter components.
R
the normal full load current 50µA applied through the R
resistor (or at a different full load current if adjusted as under
“Over-current, Selecting R
R
For a V
The AC feedback components, R
relation to R
Current Balancing
The detected currents are also used to balance the phase
currents.
Each phase’s current is compared to the average of the two
phase currents, and the difference is used to create an offset
in that phase’s PWM comparator. The offset is in a direction
to reduce the imbalance.
The balancing circuit can not make up for a difference in
r
higher r
reduced.
Figures 8 and 9 show the inductor current of a two phase
system without and with current balancing.
Inductor Current
The inductor current in each phase of a multi-phase Buck
converter has two components. There is a current equal to
the load current divided by the number of phases (I
and a sawtooth current, (i
The sawtooth component is dependent on the size of the
inductors, the switching frequency of each phase, and the
values of the input and output voltage. Ignoring secondary
effects, such as series resistance, the peak to peak value of
the sawtooth current can be described by:
i
Where: V
Example: For V
Then i
PK-PK
DS(ON)
IN
IN
should be selected to give the desired “droop” voltage at
= V
PK-PK
= (V
DROOP
DROOP
DS(ON)
between synchronous rectifiers. If a FET has a
CORE
IN
F
IN
V
= 4.3A
SW
x V
.
IN
, the current through that phase will be
L = value of the inductor
of 80mV, R
CORE
/ 50µA
F
CORE
= DC value of the output or V
= DC value of the input or supply voltage
= switching frequency
V
SW
IN
L = 1.3µH,
= 1.6V,
= 12V,
= 250kHz,
- V
PK-PK
ISEN
IN
CORE
11
= 1.6kΩ
” above).
) resulting from switching.
2
FB
) / (L x F
and Cc, are scaled in
SW
x V
ID
voltage
IN
LT
)
/ n),
ISEN
ISL6553
The inductor, or load current, flows alternately from V
through Q1 and from ground through Q2. The ISL6553
samples the on-state voltage drop across each Q2 transistor
to indicate the inductor current in that phase. The voltage
drop is sampled 1/3 of a switching period, 1/F
turned OFF and Q2 is turned on. Because of the sawtooth
current component, the sampled current is different from the
average current per phase. Neglecting secondary effects,
the sampled current (I
current (I
I
Where: I
Example: Using the previously given conditions, and
For I
Then I
SAMPLE
FIGURE 8. TWO CHANNEL multi-phase SYSTEM WITH
FIGURE 9. TWO CHANNEL multi-phase SYSTEM WITH
LT
25
20
15
10
5
0
n = 2
SAMPLE
25
20
15
10
5
0
LT
LT
= 50A,
= I
n = the number of channels
) by:
LT
CURRENT BALANCING DISABLED
CURRENT BALANCING ENABLED
= total load current
/ n + (V
= 25.49A
IN
SAMPLE
V
CORE
) can be related to the load
- 3V
CORE
2
) / (6L x F
SW
, after Q1 is
SW
IN
x V
IN
)

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