ISL6564AIRZ-T Intersil, ISL6564AIRZ-T Datasheet
ISL6564AIRZ-T
Specifications of ISL6564AIRZ-T
Related parts for ISL6564AIRZ-T
ISL6564AIRZ-T Summary of contents
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... MARKING (°C) ISL6564ACRZ* ISL6564 ACRZ 6x6 QFN (Note) ISL6564AIRZ* ISL6564 AIRZ - 6x6 QFN (Note) *Add “-T” suffix for tape and reel. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations ...
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Pinout VID5 VID4 VID3 VID2 VID1 VID0 GND OFS IOUT DAC 2 ISL6564A ISL6564A (40 LD QFN) TOP VIEW GND ...
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ISL6564A Block Diagram PGOOD VDIFF RGND x1 VSEN OVP +200mV OFS OFFSET REF DAC VID5 VID4 DYNAMIC VID3 VID VID2 D/A VID1 VID0 COMP FB IDROOP IOUT 3 ISL6564A OVP DRVEN VCC OVP R S POWER-ON LATCH RESET (POR) Q ...
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Typical Application for Voltage Regulation without Droop Using r FB COMP REF IDROOP DAC VDIFF VSEN VCC RGND VIDPGOOD ENLL EN PGOOD ISL6564A OVP ISEN1+ VID5 ISEN1- VID4 PWM1 PWM2 VID3 ISEN2+ VID2 ISEN2- VID1 PWM3 ISEN3+ VID0 ISEN3- DRVEN ...
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Typical Application for Voltage Regulation without Droop Using DCR Sensing FB COMP REF IDROOP DAC VDIFF VSEN VCC RGND VIDPGOOD ENLL EN PGOOD ISL6564A OVP ISEN1+ VID5 ISEN1- VID4 PWM1 PWM2 VID3 ISEN2+ VID2 ISEN2- VID1 PWM3 ISEN3+ VID0 ISEN3- ...
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Typical Application for Load Line Regulation Using r FB COMP REF IDROOP DAC VDIFF VSEN VCC RGND VIDPGOOD ENLL PGOOD ISL6564A OVP ISEN1+ VID4 ISEN1- VID3 PWM1 PWM2 VID2 ISEN2+ VID1 ISEN2- VID0 PWM3 ISEN3+ VID12.5 ISEN3- DRVEN OFS PWM4 ...
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Typical Application for Load Line Regulation Using DCR Sensing and External NTC FB COMP REF IDROOP DAC VDIFF VSEN VCC RGND VIDPGOOD ENLL PGOOD ISL6564A OVP ISEN1+ VID4 ISEN1- VID3 PWM1 PWM2 VID2 VID1 ISEN2+ ISEN2- VID0 PWM3 ISEN3+ VID12.5 ...
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... Supply Voltage, VCC (5V bias mode, Note +5V ±5% Ambient Temperature (ISL6564ACRZ 0°C to +70°C Ambient Temperature (ISL6564AIRZ .-40°C to +85°C CAUTION: Stress above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied ...
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Electrical Specifications Operating Conditions: VCC = 5V or ICC < 25mA (Note 3). Unless Otherwise Specified. (Continued) PARAMETER OSCILLATOR Accuracy Adjustment Range Sawtooth Amplitude Max Duty Cycle ERROR AMPLIFIER Open-Loop Gain Open-Loop Bandwidth Maximum Output Voltage Output High Voltage @ ...
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... Dynamic VID™ operations. PWM1, PWM2, PWM3, PWM4 Pulse-width modulation outputs. Connect these pins to the PWM input pins of the Intersil driver IC. The number of active channels is determined by the state of PWM3 and PWM4. Leave PWM4 unconnected and tie PWM3 to VCC to configure for 2-phase operation ...
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... DRVEN Driver enable pin. This pin can be used to enable the drivers which have enable pins such as ISL6605 or ISL6608. If ISL6564A is used with Intersil ISL6612 drivers, it’s not necessary to use this pin. IDROOP and IOUT IDROOP and IOUT are the output pins of sensed average channel current which is proportional to load current ...
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INPUT-CAPACITOR CURRENT, 10A/DIV CHANNEL 3 INPUT CURRENT 10A/DIV CHANNEL 2 INPUT CURRENT 10A/DIV CHANNEL 1 INPUT CURRENT 10A/DIV 1µs/DIV FIGURE 2. CHANNEL INPUT CURRENTS AND INPUT- CAPACITOR RMS CURRENT FOR 3-PHASE CONVERTER The output capacitors conduct the ripple component of ...
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I L PWM t HOLD SAMPLE CURRENT, I SWITCHING PERIOD TIME FIGURE 3. SAMPLE AND HOLD TIMING Current Sensing The ISL6564A supports inductor DCR sensing, MOSFET r sensing, or resistive sensing techniques. The DS(ON) internal circuitry, shown in Figures 4, ...
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... The output of the error amplifier, V sawtooth waveform to generate the PWM signals. The PWM signals control the timing of the Intersil MOSFET drivers and DS(ON) regulate the converter output to the specified reference voltage. The internal and external circuitry which control voltage regulation is illustrated in Figure 8 ...
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EXTERNAL CIRCUIT ISL6564A INTERNAL CIRCUIT COMP DAC R REF REF C REF FB I IDROOP + AVG DROOP - VDIFF VSEN V + OUT RGND V - OUT FIGURE 8. OUTPUT VOLTAGE AND ...
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TABLE 1. VOLTAGE IDENTIFICATION (VID) CODES (Continued) VID5 VID4 VID3 VID2 VID1 400 200 100 ...
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FB DYNAMIC VID D/A E 0.5V - GND VCC FIGURE 9. OUTPUT VOLTAGE OFFSET PROGRAMMING WITH ISL6564A Dynamic VID Modern microprocessors need to make changes to their core voltage as part of normal operation. They direct ...
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... ICs reach their POR level before the ISL6564A becomes enabled. The schematic in Figure 10 demonstrates sequencing the ISL6564A with the ISL66Xx family of Intersil MOSFET drivers, which require 12V bias. 3. The voltage on ENLL must be logic high to enable the controller. This pin is typically connected to the VID_PGOOD ...
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... VSEN falls below 0.6V with valid VCC or 1.5V otherwise. This causes the Intersil drivers to turn on the lower MOSFETs and pull the output voltage below a level that might cause damage to the load. The PWM outputs remain low until VDIFF falls to the programmed DAC level when they enter a high-impedance state ...
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... SW At the beginning of overcurrent shutdown, the controller places all PWM signals in a high-impedance state within 20ns commanding the Intersil MOSFET driver ICs to turn off both upper and lower MOSFETs. The system remains in this state a period of 4096 switching cycles. If the controller is still enabled at the end of this wait period, it will attempt a soft-start ...
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... It is assumed that the reader is familiar with many of the basic skills and techniques referenced below. In addition to this guide, Intersil provides complete reference designs that include schematics, bills of materials, and example board layouts for all common microprocessor applications ...
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In Equation 16, the required time for this commutation is t approximated associated power loss is P ⎛ ⎞ ⎞ t ⎛ 1 ≈ ⎜ ⎟ ...
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C (OPTIONAL COMP FB + IDROOP DROOP - VDIFF FIGURE 18. COMPENSATION CONFIGURATION FOR LOAD-LINE REGULATED ISL6564A CIRCUIT The feedback resistor has already been chosen as FB outlined in Load-Line ...
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Equation 25 ESR ---------------------------------------- - ESR – ESR – ---------------------------------------- - 0.75V ...
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Input Supply Voltage Selection The VCC input of the ISL6564A can be connected either directly to a +5V supply or through a current limiting resistor to a +12V supply. An integrated 5.8V shunt regulator maintains the voltage on the VCC ...
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... Align the output inductors and MOSFETs such that space between the components is minimized while creating the PHASE plane. Place the Intersil MOSFET driver IC as close as possible to the MOSFETs they control to reduce the parasitic 0.8 1 ...
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Package Outline Drawing L40.6x6 40 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 3, 10/06 6.00 6 PIN 1 INDEX AREA (4X) 0.15 TOP VIEW ( TYP ) ( TYPICAL RECOMMENDED LAND PATTERN 27 ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...