EL7512CY Intersil, EL7512CY Datasheet - Page 7

• Manufacturer Part Number: EL7512CY
• Description: IC REG PWM STEP UP 10-MSOP
• Manufacturer: Intersil

Specifications of EL7512CY

• Pwm Type: Controller
• Number Of Outputs: 1
• Frequency - Max: 1.2MHz
• Duty Cycle: 90%
• Voltage - Supply: 2 V ~ 12 V
• Buck: No
• Boost: Yes
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 10-MSOP, Micro10™, 10-uMAX, 10-uSOP
• Frequency-max: 1.2MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

diode is recommended and it should be able to handle those
currents.
Output voltage ripple is the product of peak inductor current
times the ESR of output capacitor. Low ESR capacitor is to
be used to reduce the output ripple. The minimum output
capacitance of 330µF, 47µF, and 33µF is recommended for
5V, 12V, and 16V for 600kHz switching frequency,
respectively. For 1MHz switching frequency, 220µF, 33µF,
and 22µF capacitor can be used for the output voltages. In
addition to the voltage rating, the output capacitor should
also be able to handle the rms current is given by:
Output Voltage
An external resistor divider is required to divide the output
voltage down to the nominal reference voltage. The current
drawn by the resistor network should be limited to maintain
the overall converter efficiency. The maximum value of the
resistor network is limited by the feedback input bias current
and the potential for noise being coupled into the feedback
pin. A resistor network less than 300kΩ is recommended.
The boost converter output voltage is determined by the
relationship:
where V
this data sheet.
RC Filter
The maximum voltage rating for the V
recommended to be about 10V for maximum efficiency to
drive the internal MOSFET. The series resistor R4 in the RC
filter connected to V
If V
where I
be 10Ω to 51Ω with C4 = 0.1µF.
Thermal Performance
The EL7512 uses a fused-lead package, which has a
reduced θ
on a two-layer board. Maximizing copper around the ground
pins will improve the thermal performance.
This chip also has internal thermal shut-down set at around
135°C to protect the component.
O
is larger than 10V, then:
I
DD
CORMS
FB
JA
is shown in I
slightly changes with V
of 100°C/W on a four-layer board and 115°C/W
=
V
1 (
DD
OUT
–
D )
can be utilized to reduce the voltage.
DD
R
4
=
×
vs F
=
V




D
FB
V
-------------------- -
7
+
O
I
S
×
DD
------------------- -
I
–
LAVG
curve. Otherwise, R4 can



∆I
DD
10
1
L
+
2
. The curve is shown in
DD
R
------ -
R
2
2
1
×



pin is 12V and is
----- -
12
1




×
I
LAVG
EL7512
Layout Considerations
The layout is very important for the converter to function
properly. Power Ground (
should be separated to ensure that the high pulse current in
the Power Ground never interferes with the sensitive signals
connected to Signal Ground. They should only be connected
at one point.
The trace connected to pin 8 (FB) is the most sensitive trace.
It needs to be as short as possible and in a “quiet” place,
preferably between PGND or SGND traces.
In addition, the bypass capacitor connected to the V
needs to be as close to the pin as possible.
The heat of the chip is mainly dissipated through the SGND
pin. Maximizing the copper area around it is preferable. In
addition, a solid ground plane is always helpful for the EMI
performance.
The demo board is a good example of layout based on these
principles. Please refer to the EL7512 Application Brief for
the layout.
) and Signal Ground
(-
DD
--)
pin