HIP6004ECV-T Intersil, HIP6004ECV-T Datasheet - Page 10
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HIP6004ECV-T
Manufacturer Part Number
HIP6004ECV-T
Description
IC CTRLR PWM VOLTAGE MON 20TSSOP
Manufacturer
Intersil
Datasheet
1.HIP6004ECBZ.pdf
(13 pages)
Specifications of HIP6004ECV-T
Pwm Type
Voltage Mode
Number Of Outputs
1
Frequency - Max
1MHz
Duty Cycle
100%
Voltage - Supply
5 V ~ 12 V
Buck
Yes
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
No
Operating Temperature
0°C ~ 70°C
Package / Case
20-TSSOP
Frequency-max
1MHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HIP6004ECV-T
Manufacturer:
INTERSIL
Quantity:
20 000
within their maximum junction temperature at high ambient
temperature by calculating the temperature rise according to
package thermal-resistance specifications. A separate heatsink
may be necessary depending upon MOSFET power, package
type, ambient temperature and air flow.
Standard-gate MOSFETs are normally recommended for
use with the HIP6004E. However, logic-level gate MOSFETs
can be used under special circumstances. The input voltage,
upper gate drive level, and the MOSFET’s absolute gate-to-
source voltage rating determine whether logic-level
MOSFETs are appropriate.
Figure 9 shows the upper gate drive (BOOT pin) supplied by a
bootstrap circuit from V
develops a floating supply voltage referenced to the PHASE
pin. This supply is refreshed each cycle to a voltage of V
less the boot diode drop (V
turns on. Logic-level MOSFETs can only be used if the
MOSFET’s absolute gate-to-source voltage rating exceeds
the maximum voltage applied to VCC.
Figure 10 shows the upper gate drive supplied by a direct
connection to V
converter systems where the main input voltage is +5V
less. The peak upper gate-to-source voltage is approximately
V
for the bias, the gate-to-source voltage of Q
level MOSFET is a good choice for Q
MOSFET can be used for Q
voltage rating exceeds the maximum voltage applied to V
P
Where: D is the duty cycle = V
P
CC
LOWER
UPPER
+
-
FIGURE 9. UPPER GATE DRIVE - BOOTSTRAP OPTION
HIP6004E
less the input supply. For +5V main power and +12V
+12V
VCC
t
F
SW
= Io
S
= Io
is the switching frequency.
is the switch ON time, and
2
2
x r
x r
CC
DS(ON)
DS(ON)
+ V
GND
D
. This option should only be used in
BOOT
BOOT
UGATE
PHASE
LGATE
PGND
D
-
CC
x D +
x (1 - D)
. The boot capacitor, C
D
OUT
2
C
) when the lower MOSFET, Q
10
1
2
BOOT
if its absolute gate-to-source
Io x V
/ V
IN
Q1
Q2
+5V OR +12V
,
1
IN
and a logic-level
x t
SW
1
D2
is 7V. A logic-
NOTE:
V
x F
NOTE:
V
G-S
G-S
S
BOOT
≈
≈
V
V
CC
CC
DC
CC
-V
CC
DC
2
D
or
HIP6004E
.
FIGURE 10. UPPER GATE DRIVE - DIRECT V
HIP6004E
-
+
+12V
VCC
GND
BOOT
UGATE
PHASE
LGATE
PGND
Q
Q
+5V OR LESS
1
2
D
CC
2
NOTE:
V
NOTE:
V
G-S
DRIVE OPTION
G-S
≈
≈
V
V
CC
CC
-5V