ISL6520BIR Intersil, ISL6520BIR Datasheet - Page 5

• Manufacturer Part Number: ISL6520BIR
• Description: IC CTRLR PWM SYNC BUCK 16-QFN
• Manufacturer: Intersil

Specifications of ISL6520BIR

• Pwm Type: Voltage Mode
• Number Of Outputs: 1
• Frequency - Max: 340kHz
• Duty Cycle: 100%
• Voltage - Supply: 4.5 V ~ 5.5 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-VQFN Exposed Pad, 16-HVQFN, 16-SQFN, 16-DHVQFN
• Frequency-max: 340kHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

rail, which supplies the bias voltage to the ISL6520B. If there
is nowhere for this current to go, such as to other distributed
loads on the V
device, or other methods, the capacitance on the V
will absorb the current. This situation will allow voltage level
of the V
boosted to a level that exceeds the maximum voltage rating
of the ISL6520B, then the IC will experience an irreversible
failure and the converter will no longer be operational.
Ensuring that there is a path for the current to follow other
than the capacitance on the rail will prevent this failure
mode.
Application Guidelines
Layout Considerations
As in any high frequency switching converter, layout is very
important. Switching current from one power device to another
can generate voltage transients across the impedances of the
interconnecting bond wires and circuit traces. These
interconnecting impedances should be minimized by using
wide, short printed circuit traces. The critical components
should be located as close together as possible, using ground
plane construction or single point grounding.
Figure 2 shows the critical power components of the converter.
To minimize the voltage overshoot, the interconnecting wires
indicated by heavy lines should be part of a ground or power
plane in a printed circuit board. The components shown in
Figure 2 should be located as close together as possible.
Please note that the capacitors C
represent numerous physical capacitors. Locate the ISL6520B
within 3 inches of the MOSFETs, Q
for the MOSFETs’ gate and source connections from the
ISL6520B must be sized to handle up to 1A peak current.
Figure 3 shows the circuit traces that require additional
layout consideration. Use single point and ground plane
construction for the circuits shown. Minimize any leakage
current paths on the COMP/SD pin and locate the resistor,
R
current source is only 20μA. Provide local V
between VCC and GND pins. Locate the capacitor, C
OSCET
FIGURE 2. PRINTED CIRCUIT BOARD POWER AND
ISL6520B
CC
close to the COMP/SD pin because the internal
UGATE
PHASE
LGATE
rail to increase. If the voltage level of the rail is
GROUND PLANES OR ISLANDS
CC
rail, through a voltage limiting protection
Q
V
Q
RETURN
2
IN
1
5
IN
1
and C
and Q
C
O
IN
2
may each
. The circuit traces
L
O
CC
C
O
decoupling
V
OUT
CC
BOOT
bus
ISL6520B
as close as practical to the BOOT and PHASE pins. All
components used for feedback compensation should be
located as close to the IC a practical.
Feedback Compensation
Figure 4 highlights the voltage-mode control loop for a
synchronous-rectified buck converter. The output voltage
(V
error amplifier (Error Amp) output (V
the oscillator (OSC) triangular wave to provide a
pulse-width modulated (PWM) wave with an amplitude of
V
output filter (L
ΔV
IN
OUT
FIGURE 4. VOLTAGE-MODE BUCK CONVERTER
FIGURE 3. PRINTED CIRCUIT BOARD SMALL SIGNAL
OSC
at the PHASE node. The PWM wave is smoothed by the
ISL6520B
) is regulated to the Reference voltage level. The
OSC
GND
COMPARATOR
O
COMPENSATION DESIGN
LAYOUT GUIDELINES
ERROR
AMP
DETAILED COMPENSATION COMPONENTS
V
ISL6520B
and C
E/A
PWM
BOOT
PHASE
VCC
C
Z
+
-
FB
BOOT
-
+
COMP/SD
O
C
REFERENCE
).
1
REFERENCE
+5V
C
+
-
2
C
DRIVER
DRIVER
R
D
VCC
Z
2
1
IN
FB
Z
E/A
FB
Q
Q
+V
PHASE
1
2
(PARASITIC)
V
) is compared with
C
IN
IN
3
L
L
Z
R
O
O
IN
1
C
O
R
ESR
C
3
O
V
OUT
July 23, 2007
V
OUT
V
FN9083.3
OUT