ISL6227CAZ-T Intersil, ISL6227CAZ-T Datasheet - Page 26

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ISL6227CAZ-T

Manufacturer Part Number
ISL6227CAZ-T
Description
IC CONTROLLER DDR, DDR2 28QSOP
Manufacturer
Intersil
Datasheets

Specifications of ISL6227CAZ-T

Package / Case
28-QSOP
Mounting Type
Surface Mount
Voltage - Output
0.9 ~ 5.5 V
Voltage - Input
5 ~ 28 V
Operating Temperature
-10°C ~ 100°C
Applications
Controller, DDR, DDR2
Number Of Outputs
2
Peak Reflow Compatible (260 C)
Yes
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Copper Size for the Phase Node
Big coppers on both sides of the Phase node introduce
parasitic capacitance. The capacitance of PHASE should be
kept very low to minimize ringing. If ringing is excessive, it
could easily affect current sample information. It would be
best to limit the size of the PHASE node copper in strict
accordance with the current and thermal management of the
application.
Identify the Power and Signal Ground
The input and output capacitors of the converters, the source
terminals of the bottom switching MOSFET PGND1, and
PGND2, should be closely connected to the power ground.
The other components should connect to signal ground.
Signal and power ground are tied together at the negative
terminal of the output capacitors.
26
ISL6227
Decoupling Capacitor for Switching MOSFET
It is recommended that ceramic caps be used closely
connected to the drain side of the upper MOSFET, and the
source of the lower MOSFET. This capacitor reduces the
noise and the power loss of the MOSFET. Refer to Figure 43
for the power component placement.
FIGURE 43. A GOOD EXAMPLE POWER COMPONENT
V
o
-
-
+
+
REPLACEMENT. IT SHOWS THE NEGATIVE OF
INPUT AND OUTPUT CAP AND THE SOURCE OF
THE MOSFET ARE TIED AT ONE POINT.
-
-
V
V
IN
IN
L
L
o
o
+
+
December 21, 2006
FN9094.4

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