ISL6336CRZ Intersil, ISL6336CRZ Datasheet - Page 13

• Manufacturer Part Number: ISL6336CRZ
• Description: IC CTRLR PWM 6PHASE BUCK 48-QFN
• Manufacturer: Intersil

Specifications of ISL6336CRZ

• Applications: Controller, Intel VR11.1
• Voltage - Input: 3 ~ 12 V
• Number Of Outputs: 1
• Voltage - Output: 0.5 ~ 1.6 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-VQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Non-CI or (N - 1 ) - CI Drops to 1-Phase
Non-CI or (N - 2) - CI Drops to 2-Phase
2-Phase CI Drops to 1-Phase
2-Phase CI Drops to 2-Phase
Normal
Connecting the PWM5 pin to VCC selects 4-phase operation
and the pulse times are spaced in 1/4 cycle increments, etc.
When PSI# is pulled LOW, indicating low power operation of
the processor, the controller reduces the number of active
phases and operates 1- or 2-phases to improve efficiency
based on the logic in Table 2. Table 1 shows which phases
will be active when PSI# = 0 based on the phase count of the
application. For example, If operating in a 6-phase
configuration, phase 1 will be active if dropping to 1-phase
and phases 1 and 4 will be active if dropping to 2-phases.
6-Phase
5-Phase
4-Phase
3-Phase
2-Phase
1-Phase
The SS and FS pins are used to program the controllers PWM
behavior in configurations using standard inductors, 2-phase
coupled inductors or (N - 1)/(N - 2)-phase coupled inductors
when PSI# goes LOW. 2-phase coupled inductors refer to
inductor structures that magnetically couple 2-phases together.
(N - 1) and (N - 2) coupled inductors refer to structures that
couple all phases together except for the 1- or 2-phases that
remain active in PSI# mode. N refers to the programmed
number of active phases in normal operation, PSI# = 1
(Table 1). Each case yields different PWM output behavior on
both the dropped phase(s) and active phases as PSI# is
asserted and de-asserted. In Table 2, ‘VCC’ means that the
resistor is connected from the respective pin to VCC and ‘GND’
means the resistor is connected from the respective pin to
GND.
When PSI# goes LOW, the dropped phase’s PWM signal is
forced LOW for a minimum time and then is driven to
1/2*VCC while the remaining active phase PWM(s) sends
out a repetitive 3-level PWM pattern that the dedicated
PHASE
COUNT
TABLE 1. NUMBER OF ACTIVE PHASES AND PWM FIRING
CONFIGURATION
1 - 2 - 3 - 4 - 5 - 6
TABLE 2. PHASE DROPPING BEHAVIOR
1 - 2 - 3 - 4 - 5
SEQUENCE
OPERATION
SEQUENCE
1 - 2 - 3- 4
NORMAL
PHASE
1 - 2 - 3
1 - 2
1
13
PWM5:6 = VCC
PWM4:6 = VCC
PWM3:6 = VCC
PWM2:6 = VCC
PWM6 = VCC
PWM/VCC
PSI#
0
0
0
0
1
-
RESISTOR
GND
GND
VCC
VCC
FS
x
Phase 1/4
Phase 1/3
Phase 1/3
Phase 1/2
Phase 1/2
PHASES
PSI# = 0
RESISTOR
ACTIVE
ISL6336, ISL6336A
GND
GND
VCC
VCC
-
SS
x
VR11.1 drivers (ISL6622/ISL6620) can decode and then
enter diode emulation mode.
The ISL6336A only generates the standard 2-level PWM
signal except in FAULT conditions. The dedicated VR11.1
drivers do not need to be used with the ISL6336A. See
“Controller and Driver Recommendations” on page 3 for
more details.
During soft-start or overcurrent hiccup mode all phases will be
operating despite the state of the PSI# pin. Once VR_RDY is
asserted the state of the PSI# pin is considered.
A high PSI# input signal will force the controller back into
CCM normal operation and all phases will be activated to
sustain a heavy load transient and to increase efficiency at
higher loads.
While the controller is operational (VCC above POR,
EN_VTT and EN_PWR are both high, valid VID inputs), it
can pull the PWM pins to ~40% of VCC (~2V for 5V VCC
bias) during various stages, such as soft-start delay, phase
shedding operation, or fault conditions (OC or OV events).
The matching driver's internal PWM resistor divider can
further raise the PWM potential, but not lower it below the
level set by the controller IC. Therefore, the controller's
PWM outputs are directly compatible with Intersil drivers that
require 5V PWM signal amplitudes. Drivers requiring 3.3V
PWM signal amplitudes are generally incompatible.
Switching Frequency
The switching frequency is determined by the selection of
the frequency-setting resistor, R
FS pin to GND or VCC (see “Typical Application - 5-Phase
Buck Converter with DCR Sensing and Integrated TCOMP”
on page 5 and “Typical Application - 4-Phase Buck
Converter with coupled inductors” on page 6). Equation 3 is
provided to assist in selecting the correct resistor value.
R
where F
Equation 3 also applies for connecting FS to VCC or GND.
Figure 3 shows the relationship between RT and F
according to Equation 3.
T
1000
=
900
800
700
600
500
400
300
200
100
2.5X10
------------------------- -
20
F
SW
SW
FIGURE 3. SWITCHING FREQUENCY vs RT
is the switching frequency of each phase.
10
30
40
50
R
T
T
60
(kΩ)
, which is connected from
70
80
90
SW
May 28, 2009
FN6504.1
,
(EQ. 3)
100