ISL6260CRZ-T Intersil, ISL6260CRZ-T Datasheet
ISL6260CRZ-T
Specifications of ISL6260CRZ-T
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ISL6260CRZ-T Summary of contents
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... MARKING (°C) ISL6260CRZ ISL6260CRZ -10 to 100 40 Ld 6x6 QFN L40.6x6 ISL6260CRZ-T ISL6260CRZ -10 to 100 40 Ld 6x6 QFN L40.6x6 ISL6260BCRZ ISL6260BCRZ -10 to 100 40 Ld 6x6 QFN L40.6x6 ISL6260BCRZ-T ISL6260BCRZ -10 to 100 40 Ld 6x6 QFN L40.6x6 NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets ...
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Functional Pin Description PSI# 1 PGD_IN 2 RBIAS 3 4 VR_TT# 5 NTC GND PAD (BOTTOM) 6 SOFT 7 OCSET COMP PSI# Low ...
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PWM2 PWM output for channel 2. For ISL6260B, PSI# low will make this output tri-state. PWM1 PWM output for channel 1. VID0, VID1, VID2, VID3, VID4, VID5, VID6 VID input with VID0 = LSB. CLK_EN# Digital output to enable System ...
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Absolute Maximum Ratings Supply Voltage, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 - +7V Battery Voltage, VIN. ...
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Electrical Specifications Operating Conditions: VDD = 5V, T PARAMETER ISEN Imbalance Voltage Input Bias Current SOFT CURRENT Soft-start current SOFT Geyserville Current SOFT Deeper Sleep Entry Current SOFT Deeper Sleep Exit Current SOFT Deeper Sleep Exit Current POWER GOOD AND ...
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Typical Operating Performance 100 100 (A) Iout(A ) OUT FIGURE 1. ACTIVE MODE EFFICIENCY, 3 PHASE, CCM, PSI# = HIGH, VID = 1.4375V 100 90 ...
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Typical Operating Performance 100 Iout (A) FIGURE 7. ACTIVE MODE EFFICIENCY, 2 PHASE, CCM, PSI# = HIGH, VID = 1.4375V 100 0.1 1 Iout (A) FIGURE 9. DEEPER ...
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Typical Operating Performance VR_ON FIGURE 13. SOFT-START WAVEFORM SHOWING SLEW RATE OF 2mV/µ 1.2V (BOOT VOLTAGE) Vin Vout FIGURE 15. 12V-18V INPUT LINE TRANSIENT RESPONSE FIGURE 17. 3 PHASE CURRENT BALANCE, FULL LOAD = 50A 8 ISL6260, ISL6260B ...
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Typical Operating Performance Vout COMP PIN FIGURE 19. TRANSIENT LOAD RESPONSE, 40A LOAD STEP @ 200A/µs, 3 PHASE FIGURE 21. TRANSIENT LOAD 3 PHASE OPERATION, ZOOM OF RISING EDGE CURRENT BALANCE VID MSB Vout FIGURE 23. ISL6260, VID MSB BIT ...
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Typical Operating Performance Vout DPRSTP# AND PSI# FIGURE 25. C4 ENTRY AND EXIT SLEW RATES WITH DPRSLPVR AND DPRSTP# (ISL6260) PWM Pgood FIGURE 27. UNDERVOLTAGE RESPONSE SHOWING PWM TRI-STATE, VOUT < VID - 300mV Iphase Vout Pgood FIGURE 29. OCP ...
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Typical Operating Performance PSI# CLK_EN# Vout PHASE 2 FIGURE 31. ISL6260B PHASE ADDING AND DROPPING IN DEEPER SLEEP MODE, LOAD CURRENT = 4.35A PHASE 1 CURRENT PHASE 2 CURRENT PHASE 2 FIGURE 33. ISL6260B, INDUCTOR CURRENT WAVEFORM WITH PHASE ADDING ...
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Simplified Application Circuit for DCR Current Sensing Figure 35 shows a simplified application circuit for the ISL6260 or ISL6260B converter. Both the MOSFET driver IC and main control IC are shown. The driver has a force- continuous-conduction-mode (FCCM) input, that ...
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Simplified Application Circuit for Resistive Current Sensing Figure 36 shows a simplified application circuit for the ISL6260 or ISL6260B converter. Both the MOSFET drivers and main control IC are shown. The driver has a force VR_TT# 7 VID<0:6> DPRSTP# DPRSLPVR ...
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Functional Block Diagram RBIAS VID0 VID1 VID2 VID3 DAC DACOUT VID4 VID5 VID6 MODE FCCM CONTROL VO VR_ON MODE PSI# SOFT CONTROL DPRSLPVR DPRSTP# NUMBER OF PHASES 10µA GAIN SELECT (ISL6260B ONLY) OCSET (1, 2/3, or 1/2) + VSUM DROOP ...
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Theory of Operation Operational Description The ISL6260 and ISL6260B are multiphase regulators implementing Intel® IMVP-6 protocol. They can be programmed for one-, two- or three-channel operation for microprocessor core applications up to 70A. With their mating gate driver, the ISL6208, ...
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Static Operation After the start sequence, the output voltage will be regulated to the value set by the VID inputs per Table 1. This Table is presented in its entirety in the Intel IMVP-6™ specification. The ISL6260, ISL6260B will control ...
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... Sleep to Active mode, DPRSLPVR LOW achieves maximum dV/dt. Therefore, the ISL6260 and ISL6260B are IMVP-6 compliant for DPRSTP# and DPRSLPVR logic. 3 Intersil's R intrinsically has voltage-feed-forward. High- speed input voltage steps result in insignificant output voltage perturbations. Refer to Figure 15 in the “Typical Operating Performance” section of this document for Input Transient Performance ...
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TABLE 3. SUMMARY OF THE FAULT PROTECTION AND RESET OPERATIONS OF ISL6260, ISL6260B FAULT DURATION PRIOR TO PROTECTION Overcurrent 120µs Way-Overcurrent <2µs Overvoltage 1.7V Immediately Overvoltage +200mV 1ms Undervoltage -300mV 1ms Phase Current Unbalance 1ms Over Temperature Immediately Refer to ...
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Using a SLEWRATE of 10mV/μs, and the typical I given in the Electrical Specification Table of 200μA, C 200μA ----------------- - 0.020μF SOFT 10mV --------------- - 1μs A choice of 0.015μF would guarantee a SLEWRATE of 10mV/μs ...
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Rfset is in kΩ and the switching period is in μ Period μ 0.29 ) × Rfset kΩ 2.33 = – In discontinuous conduction mode, (DCM), the ISL6260, ISL6260B ...
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OC + Internal to ISL6260 + Σ RTN VDIFF FIGURE 43. EQUIVALENT MODEL FOR DROOP AND DIE SENSING USING DCR SENSING We do this using the assumption that we desire approximately ...
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The new value will be calculated by Rdrp 2 _ new ( Rdrp 1 Rdrp 80 mV For the best accuracy, the effective resistance on the DFB and VSUM pins ...
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The error current that results is given by 2mV/DCR. If DCR = 1mΩ then the error is 2A. In the above example, the two errors add to 4A. ...
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OC + DROOP Internal to ISL6260 + Σ RTN VDIFF FIGURE 44. EQUIVALENT MODEL FOR DROOP AND DIE SENSING USING DISCRETE RESISTOR SENSING slope, Rdroop is 0.0021 (V/A), we can then ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...